soc/intel: Rename heci_init to cse_init

This patch renames heci_init() to cse_init() as HECI initialization
should have a bigger scope than just initializing the CSE
(a.k.a HECI1 alone).

BUG=none
TEST=Able to build and boot google/taeko.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: Ic7edd55ccdcd70b244615fa06f81803a0ae6ce80
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64854
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
Reviewed-by: Sean Rhodes <sean@starlabs.systems>

src/soc/intel/cannonlake/romstage/romstage.c

@@ -125,7 +125,7 @@ void mainboard_romstage_entry(void)
 	/* Program SMBus base address and enable it */
 	smbus_common_init();
 	/* initialize Heci interface */
-	heci_init(HECI1_BASE_ADDRESS);
+	cse_init(HECI1_BASE_ADDRESS);
 
 	s3wake = pmc_fill_power_state(ps) == ACPI_S3;
 	fsp_memory_init(s3wake);