soc/intel/apollolake: Add cache for BIOS ROM

Enable caching of BIOS region with variable MTRR. This is most
useful if enabled early such as in bootblock.

Change-Id: I39f33ca43f06fce26d1d48e706c97f097e3c10f1
Signed-off-by: Andrey Petrov <andrey.petrov@intel.com>
Reviewed-on: https://review.coreboot.org/14480
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins)

src/cpu/x86/mtrr/Makefile.inc

@@ -1,2 +1,3 @@
 ramstage-y += mtrr.c
 romstage-y += earlymtrr.c
+bootblock-y += earlymtrr.c