src: Add required space after "switch"

Change-Id: I85cf93e30606bc7838852bd300a369e79370629a
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/29623
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

src/northbridge/amd/agesa/family14/amdfam14_conf.c

@@ -126,7 +126,7 @@ u32 map_oprom_vendev(u32 vendev)
 {
 	u32 new_vendev = vendev;
 
-	switch(vendev) {
+	switch (vendev) {
 	case 0x10029809:
 	case 0x10029808:
 	case 0x10029807:

src/northbridge/amd/agesa/family15tn/northbridge.c

@@ -964,7 +964,7 @@ u32 map_oprom_vendev(u32 vendev)
 {
 	u32 new_vendev = vendev;
 
-	switch(vendev) {
+	switch (vendev) {
 	case 0x10029900:	/* AMD Radeon HD 7660G (Trinity)  */
 	case 0x10029901:	/* AMD Radeon HD 7660D (Trinity)  */
 	case 0x10029903:	/* AMD Radeon HD 7640G (Trinity)  */

src/northbridge/amd/agesa/family16kb/northbridge.c

@@ -989,7 +989,7 @@ u32 map_oprom_vendev(u32 vendev)
 {
 	u32 new_vendev = vendev;
 
-	switch(vendev) {
+	switch (vendev) {
 	case 0x10029830:
 	case 0x10029831:
 	case 0x10029832:

src/northbridge/amd/amdht/h3ncmn.c

@@ -1252,7 +1252,7 @@ static void ht1SetCFGAddrMap(u8 cfgMapIndex, u8 secBus, u8 subBus, u8 targetNode
  ******************************************************************************/
 static u8 convertBitsToWidth(u8 value, cNorthBridge *nb)
 {
-	switch(value) {
+	switch (value) {
 	case 1: return 16;
 	case 0: return 8;
 	case 5: return 4;

src/northbridge/amd/amdht/ht_wrapper.c

@@ -132,7 +132,7 @@ static void AMD_CB_EventNotify (u8 evtClass, u16 event, const u8 *pEventData0)
 	}
 	printk(log_level, ": ");
 
-	switch(event) {
+	switch (event) {
 		case HT_EVENT_COH_EVENTS:
 		case HT_EVENT_COH_NO_TOPOLOGY:
 		case HT_EVENT_COH_LINK_EXCEED:

src/northbridge/intel/x4x/raminit_ddr23.c

@@ -820,7 +820,7 @@ static void program_dll(struct sysinfo *s)
 	FOR_EACH_POPULATED_CHANNEL(s->dimms, i) {
 		const struct dll_setting *setting;
 
-		switch(s->selected_timings.mem_clk) {
+		switch (s->selected_timings.mem_clk) {
 		default: /* Should not happen */
 	        case MEM_CLOCK_667MHz:
 			setting = default_ddr2_667_ctrl;