src/soc/intel/apollolake: move TCO1 disable into bootblock

Cr50 reset processing could take long time, up to 30 s in the worst
case. The TCO watchdog needs to be disabled before Cr50 driver starts,
let's disable it in bootblock.

BRANCH=none
BUG=b:65867313, b:68729265
TEST=verified that resetting the device while keys are being generated
     by the TPM does not cause falling into recovery.

Change-Id: Iaf1f97924590163e45bcac667b6c607503cc8b87
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://review.coreboot.org/22553
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

src/soc/intel/apollolake/bootblock/bootblock.c

@@ -89,6 +89,8 @@ static void enable_pmcbar(void)
 
 void bootblock_soc_early_init(void)
 {
+	uint32_t reg;
+
 	enable_pmcbar();
 
 	/* Clear global reset promotion bit */
@@ -109,4 +111,9 @@ void bootblock_soc_early_init(void)
 
 	/* Initialize GPE for use as interrupt status */
 	pmc_gpe_init();
+
+	/* Stop TCO timer */
+	reg = inl(ACPI_BASE_ADDRESS + TCO1_CNT);
+	reg |= TCO_TMR_HLT;
+	outl(reg, ACPI_BASE_ADDRESS + TCO1_CNT);
 }