soc/intel/tigerlake: Add Acoustic features

Expose the following FSP UPD interface into coreboot:
- AcousticNoiseMitigation
- FastPkgCRampDisable
- SlowSlewRateFor

BUG=b:153015585
BRANCH=none
TEST= Measure the change in noise level by changing the UPD values.

Signed-off-by: Shaunak Saha <shaunak.saha@intel.com>
Change-Id: I1924a3bac8beb16a9d841891696f9a3dea0d425f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45052
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Shaunak Saha
2020-09-02 15:37:00 -07:00
committed by Tim Wawrzynczak
parent 7fa445e385
commit 0d0f43f9d3
2 changed files with 61 additions and 0 deletions

View File

@ -256,6 +256,14 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
}
}
params->AcousticNoiseMitigation = config->AcousticNoiseMitigation;
memcpy(&params->SlowSlewRate, &config->SlowSlewRate,
ARRAY_SIZE(config->SlowSlewRate) * sizeof(config->SlowSlewRate[0]));
memcpy(&params->FastPkgCRampDisable, &config->FastPkgCRampDisable,
ARRAY_SIZE(config->FastPkgCRampDisable) *
sizeof(config->FastPkgCRampDisable[0]));
/* Enable TCPU for processor thermal control */
params->Device4Enable = config->Device4Enable;