cpu/x86/tsc: Flip and rename TSC_CONSTANT_RATE to UNKNOWN_TSC_RATE
The x86 timers are a bit of a mess. Cases where different stages use different counters and timestamps use different counters from udelays. The original intention was to only flip TSC_CONSTANT_RATE Kconfig to NOT_CONSTANT_TSC_RATE. The name would be incorrect though, those counters do run with a constant rate but we just lack tsc_freq_mhz() implementation for three platforms. Note that for boards with UNKNOWN_TSC_RATE=y, each stage will have a slow run of calibrate_tsc_with_pit(). This is easy enough to fix with followup implementation of tsc_freq_mhz() for the platforms. Implementations with LAPIC_MONOTONIC_TIMER typically will not have tsc_freq_mhz() implemented and default to UNKNOWN_TSC_RATE. However, as they don't use TSC for udelay() the slow calibrate_tsc_with_pit() is avoided. Because x86/tsc_delay.tsc was using two different guards and nb/via/vx900 claimed UDELAY_TSC, but pulled UDELAY_IO implementation, we also switch that romstage to use UDELAY_TSC. Change-Id: I1690cb80295d6b006b75ed69edea28899b674b68 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33928 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -315,7 +315,7 @@ void lb_arch_add_records(struct lb_header *header)
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struct lb_tsc_info *tsc_info;
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/* Don't advertise a TSC rate unless it's constant. */
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if (!CONFIG(TSC_CONSTANT_RATE))
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if (!tsc_constant_rate())
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return;
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freq_khz = tsc_freq_mhz() * 1000;
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@ -22,7 +22,7 @@ uint64_t timestamp_get(void)
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int timestamp_tick_freq_mhz(void)
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{
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/* Chipsets that have a constant TSC provide this value correctly. */
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if (CONFIG(TSC_CONSTANT_RATE))
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if (tsc_constant_rate())
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return tsc_freq_mhz();
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/* Filling tick_freq_mhz = 0 in timestamps-table will trigger
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