AMD S3 resume: Add framwork to write bigger data

This patch is based on 'AMD S3: Program the flash in a bigger data packet'[1]

Some AMD south bridge can write bigger data when saving S3 info.
In this patch, I use config 'AMD_SB_SPI_TX_LEN' to contral data size.
AMD_SB_SPI_TX_LEN is defined in 'src/southbridge/amd/Kconfig'
and then can be overridden in the Kconfig for specific
southbridges that support larger size.

I have tested on AMD Parmer and Thatcher. We will release a new board
whose south bridge can transfer more than 4 bytes each time.

[1] http://review.coreboot.org/#/c/2306/

Change-Id: Id984955d46eae487e39d45979f1a90054aa9f54b
Signed-off-by: Siyuan Wang <SiYuan.Wang@amd.com>
Signed-off-by: Siyuan Wang <wangsiyuanbuaa@gmail.com>
Reviewed-on: http://review.coreboot.org/3413
Tested-by: build bot (Jenkins)
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
This commit is contained in:
Siyuan Wang
2013-06-08 10:25:06 +08:00
committed by Ronald G. Minnich
parent bc2c9efd56
commit 0d8d482f63
2 changed files with 12 additions and 2 deletions

View File

@@ -18,3 +18,6 @@ source src/southbridge/amd/sr5650/Kconfig
config SPI_FLASH
bool
default y if HAVE_ACPI_RESUME && CPU_AMD_AGESA
config AMD_SB_SPI_TX_LEN
int
default 4