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src/drivers: Get rid of whitespace before tab

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Change-Id: Ia9ca055679c0332613afb2bb2ed86df165de3baf
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26649
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Elyes HAOUAS
2018-05-28 15:48:04 +02:00
committed by Patrick Georgi
parent 5bd5a9ae01
commit 0d8f1dac9e
9 changed files with 86 additions and 86 deletions
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8
src/drivers/amd/agesa/acpi_tables.c
View File

@@ -26,11 +26,11 @@
IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_PI_00630F01) || \ IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_PI_00630F01) || \
IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_PI_00730F01) IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_PI_00730F01)
#define HAS_ACPI_SRAT TRUE #define HAS_ACPI_SRAT TRUE
#define HAS_ACPI_SLIT TRUE #define HAS_ACPI_SLIT TRUE
#else #else
#define HAS_ACPI_SRAT FALSE #define HAS_ACPI_SRAT FALSE
#define HAS_ACPI_SLIT FALSE #define HAS_ACPI_SLIT FALSE
#endif #endif
/* We will reference AmdLateParams later to copy ACPI tables. */ /* We will reference AmdLateParams later to copy ACPI tables. */

122
src/drivers/aspeed/common/ast_tables.h
View File

@@ -49,63 +49,63 @@
#define SyncNN (NVSync | NHSync) #define SyncNN (NVSync | NHSync)
/* DCLK Index */ /* DCLK Index */
#define VCLK25_175 0x00 #define VCLK25_175 0x00
#define VCLK28_322 0x01 #define VCLK28_322 0x01
#define VCLK31_5 0x02 #define VCLK31_5 0x02
#define VCLK36 0x03 #define VCLK36 0x03
#define VCLK40 0x04 #define VCLK40 0x04
#define VCLK49_5 0x05 #define VCLK49_5 0x05
#define VCLK50 0x06 #define VCLK50 0x06
#define VCLK56_25 0x07 #define VCLK56_25 0x07
#define VCLK65 0x08 #define VCLK65 0x08
#define VCLK75 0x09 #define VCLK75 0x09
#define VCLK78_75 0x0A #define VCLK78_75 0x0A
#define VCLK94_5 0x0B #define VCLK94_5 0x0B
#define VCLK108 0x0C #define VCLK108 0x0C
#define VCLK135 0x0D #define VCLK135 0x0D
#define VCLK157_5 0x0E #define VCLK157_5 0x0E
#define VCLK162 0x0F #define VCLK162 0x0F
/* #define VCLK193_25 0x10 */ /* #define VCLK193_25 0x10 */
#define VCLK154 0x10 #define VCLK154 0x10
#define VCLK83_5 0x11 #define VCLK83_5 0x11
#define VCLK106_5 0x12 #define VCLK106_5 0x12
#define VCLK146_25 0x13 #define VCLK146_25 0x13
#define VCLK148_5 0x14 #define VCLK148_5 0x14
#define VCLK71 0x15 #define VCLK71 0x15
#define VCLK88_75 0x16 #define VCLK88_75 0x16
#define VCLK119 0x17 #define VCLK119 0x17
#define VCLK85_5 0x18 #define VCLK85_5 0x18
#define VCLK97_75 0x19 #define VCLK97_75 0x19
#define VCLK118_25 0x1A #define VCLK118_25 0x1A
static struct ast_vbios_dclk_info dclk_table[] = { static struct ast_vbios_dclk_info dclk_table[] = {
{0x2C, 0xE7, 0x03}, /* 00: VCLK25_175 */ {0x2C, 0xE7, 0x03}, /* 00: VCLK25_175 */
{0x95, 0x62, 0x03}, /* 01: VCLK28_322 */ {0x95, 0x62, 0x03}, /* 01: VCLK28_322 */
{0x67, 0x63, 0x01}, /* 02: VCLK31_5 */ {0x67, 0x63, 0x01}, /* 02: VCLK31_5 */
{0x76, 0x63, 0x01}, /* 03: VCLK36 */ {0x76, 0x63, 0x01}, /* 03: VCLK36 */
{0xEE, 0x67, 0x01}, /* 04: VCLK40 */ {0xEE, 0x67, 0x01}, /* 04: VCLK40 */
{0x82, 0x62, 0x01}, /* 05: VCLK49_5 */ {0x82, 0x62, 0x01}, /* 05: VCLK49_5 */
{0xC6, 0x64, 0x01}, /* 06: VCLK50 */ {0xC6, 0x64, 0x01}, /* 06: VCLK50 */
{0x94, 0x62, 0x01}, /* 07: VCLK56_25 */ {0x94, 0x62, 0x01}, /* 07: VCLK56_25 */
{0x80, 0x64, 0x00}, /* 08: VCLK65 */ {0x80, 0x64, 0x00}, /* 08: VCLK65 */
{0x7B, 0x63, 0x00}, /* 09: VCLK75 */ {0x7B, 0x63, 0x00}, /* 09: VCLK75 */
{0x67, 0x62, 0x00}, /* 0A: VCLK78_75 */ {0x67, 0x62, 0x00}, /* 0A: VCLK78_75 */
{0x7C, 0x62, 0x00}, /* 0B: VCLK94_5 */ {0x7C, 0x62, 0x00}, /* 0B: VCLK94_5 */
{0x8E, 0x62, 0x00}, /* 0C: VCLK108 */ {0x8E, 0x62, 0x00}, /* 0C: VCLK108 */
{0x85, 0x24, 0x00}, /* 0D: VCLK135 */ {0x85, 0x24, 0x00}, /* 0D: VCLK135 */
{0x67, 0x22, 0x00}, /* 0E: VCLK157_5 */ {0x67, 0x22, 0x00}, /* 0E: VCLK157_5 */
{0x6A, 0x22, 0x00}, /* 0F: VCLK162 */ {0x6A, 0x22, 0x00}, /* 0F: VCLK162 */
{0x4d, 0x4c, 0x80}, /* 10: VCLK154 */ {0x4d, 0x4c, 0x80}, /* 10: VCLK154 */
{0xa7, 0x78, 0x80}, /* 11: VCLK83.5 */ {0xa7, 0x78, 0x80}, /* 11: VCLK83.5 */
{0x28, 0x49, 0x80}, /* 12: VCLK106.5 */ {0x28, 0x49, 0x80}, /* 12: VCLK106.5 */
{0x37, 0x49, 0x80}, /* 13: VCLK146.25 */ {0x37, 0x49, 0x80}, /* 13: VCLK146.25 */
{0x1f, 0x45, 0x80}, /* 14: VCLK148.5 */ {0x1f, 0x45, 0x80}, /* 14: VCLK148.5 */
{0x47, 0x6c, 0x80}, /* 15: VCLK71 */ {0x47, 0x6c, 0x80}, /* 15: VCLK71 */
{0x25, 0x65, 0x80}, /* 16: VCLK88.75 */ {0x25, 0x65, 0x80}, /* 16: VCLK88.75 */
{0x77, 0x58, 0x80}, /* 17: VCLK119 */ {0x77, 0x58, 0x80}, /* 17: VCLK119 */
{0x32, 0x67, 0x80}, /* 18: VCLK85_5 */ {0x32, 0x67, 0x80}, /* 18: VCLK85_5 */
{0x6a, 0x6d, 0x80}, /* 19: VCLK97_75 */ {0x6a, 0x6d, 0x80}, /* 19: VCLK97_75 */
{0x3b, 0x2c, 0x81}, /* 1A: VCLK118_25 */ {0x3b, 0x2c, 0x81}, /* 1A: VCLK118_25 */
}; };
static struct ast_vbios_stdtable vbios_stdtable[] = { static struct ast_vbios_stdtable vbios_stdtable[] = {
@@ -188,14 +188,14 @@ static struct ast_vbios_enhtable res_640x480[] = {
(SyncNN | HBorder | VBorder | Charx8Dot), 72, 2, 0x2E }, (SyncNN | HBorder | VBorder | Charx8Dot), 72, 2, 0x2E },
{ 840, 640, 16, 64, 500, 480, 1, 3, VCLK31_5, /* 75Hz */ { 840, 640, 16, 64, 500, 480, 1, 3, VCLK31_5, /* 75Hz */
(SyncNN | Charx8Dot) , 75, 3, 0x2E }, (SyncNN | Charx8Dot) , 75, 3, 0x2E },
{ 832, 640, 56, 56, 509, 480, 1, 3, VCLK36, /* 85Hz */ { 832, 640, 56, 56, 509, 480, 1, 3, VCLK36, /* 85Hz */
(SyncNN | Charx8Dot) , 85, 4, 0x2E }, (SyncNN | Charx8Dot) , 85, 4, 0x2E },
{ 832, 640, 56, 56, 509, 480, 1, 3, VCLK36, /* end */ { 832, 640, 56, 56, 509, 480, 1, 3, VCLK36, /* end */
(SyncNN | Charx8Dot) , 0xFF, 4, 0x2E }, (SyncNN | Charx8Dot) , 0xFF, 4, 0x2E },
}; };
static struct ast_vbios_enhtable res_800x600[] = { static struct ast_vbios_enhtable res_800x600[] = {
{1024, 800, 24, 72, 625, 600, 1, 2, VCLK36, /* 56Hz */ {1024, 800, 24, 72, 625, 600, 1, 2, VCLK36, /* 56Hz */
(SyncPP | Charx8Dot), 56, 1, 0x30 }, (SyncPP | Charx8Dot), 56, 1, 0x30 },
{1056, 800, 40, 128, 628, 600, 1, 4, VCLK40, /* 60Hz */ {1056, 800, 40, 128, 628, 600, 1, 4, VCLK40, /* 60Hz */
(SyncPP | Charx8Dot), 60, 2, 0x30 }, (SyncPP | Charx8Dot), 60, 2, 0x30 },
@@ -268,7 +268,7 @@ static struct ast_vbios_enhtable res_1920x1080[] = {
/* 16:10 */ /* 16:10 */
static struct ast_vbios_enhtable res_1280x800[] = { static struct ast_vbios_enhtable res_1280x800[] = {
{1440, 1280, 48, 32, 823, 800, 3, 6, VCLK71, /* 60Hz RB */ {1440, 1280, 48, 32, 823, 800, 3, 6, VCLK71, /* 60Hz RB */
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x35 }, (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x35 },
{1680, 1280, 72,128, 831, 800, 3, 6, VCLK83_5, /* 60Hz */ {1680, 1280, 72,128, 831, 800, 3, 6, VCLK83_5, /* 60Hz */
(SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x35 }, (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x35 },
@@ -287,7 +287,7 @@ static struct ast_vbios_enhtable res_1440x900[] = {
}; };
static struct ast_vbios_enhtable res_1680x1050[] = { static struct ast_vbios_enhtable res_1680x1050[] = {
{1840, 1680, 48, 32, 1080, 1050, 3, 6, VCLK119, /* 60Hz RB */ {1840, 1680, 48, 32, 1080, 1050, 3, 6, VCLK119, /* 60Hz RB */
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x37 }, (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x37 },
{2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25, /* 60Hz */ {2240, 1680,104,176, 1089, 1050, 3, 6, VCLK146_25, /* 60Hz */
(SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x37 }, (SyncPN | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 2, 0x37 },
@@ -296,7 +296,7 @@ static struct ast_vbios_enhtable res_1680x1050[] = {
}; };
static struct ast_vbios_enhtable res_1920x1200[] = { static struct ast_vbios_enhtable res_1920x1200[] = {
{2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz RB*/ {2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz RB*/
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x34 }, (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 60, 1, 0x34 },
{2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz RB */ {2080, 1920, 48, 32, 1235, 1200, 3, 6, VCLK154, /* 60Hz RB */
(SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 1, 0x34 }, (SyncNP | Charx8Dot | LineCompareOff | WideScreenMode | NewModeInfo), 0xFF, 1, 0x34 },

6
src/drivers/generic/gpio_keys/gpio_keys.c
View File

@@ -85,7 +85,7 @@ static void gpio_keys_fill_ssdt_generator(struct device *dev)
acpi_dp_add_string(dsd, "compatible", drv_string); acpi_dp_add_string(dsd, "compatible", drv_string);
if (config->is_polled) if (config->is_polled)
acpi_dp_add_integer(dsd, "poll-interval", acpi_dp_add_integer(dsd, "poll-interval",
config->poll_interval); config->poll_interval);
/* Child device defining key */ /* Child device defining key */
child = gpio_keys_add_child_node(config, path); child = gpio_keys_add_child_node(config, path);
if (child) if (child)
@@ -112,8 +112,8 @@ static const char *gpio_keys_acpi_name(const struct device *dev)
static struct device_operations gpio_keys_ops = { static struct device_operations gpio_keys_ops = {
.read_resources = DEVICE_NOOP, .read_resources = DEVICE_NOOP,
.set_resources = DEVICE_NOOP, .set_resources = DEVICE_NOOP,
.enable_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP,
.acpi_name = &gpio_keys_acpi_name, .acpi_name = &gpio_keys_acpi_name,
.acpi_fill_ssdt_generator = &gpio_keys_fill_ssdt_generator, .acpi_fill_ssdt_generator = &gpio_keys_fill_ssdt_generator,
}; };

2
src/drivers/intel/fsp1_0/fsp_util.c
View File

@@ -113,7 +113,7 @@ volatile u8 * find_fsp ()
); );
#else #else
volatile u8 *fsp_ptr; volatile u8 *fsp_ptr;
#endif /* __PRE_RAM__ */ #endif /* __PRE_RAM__ */
/* The FSP is stored in CBFS */ /* The FSP is stored in CBFS */
fsp_ptr = (u8 *) CONFIG_FSP_LOC; fsp_ptr = (u8 *) CONFIG_FSP_LOC;

2
src/drivers/intel/fsp1_1/cache_as_ram.inc
View File

@@ -131,7 +131,7 @@ CAR_init_done:
movd %mm1, %eax movd %mm1, %eax
pushl %eax /* tsc[63:32] */ pushl %eax /* tsc[63:32] */
movd %mm0, %eax movd %mm0, %eax
pushl %eax /* tsc[31:0] */ pushl %eax /* tsc[31:0] */
pushl %esp /* pointer to cache_as_ram_params */ pushl %esp /* pointer to cache_as_ram_params */
/* Save FSP_INFO_HEADER location in ebx */ /* Save FSP_INFO_HEADER location in ebx */

6
src/drivers/intel/gma/acpi.c
View File

@@ -72,7 +72,7 @@ drivers_intel_gma_displays_ssdt_generate(const struct i915_gpu_controller_info *
/* /*
Method (_BCL, 0, NotSerialized) Method (_BCL, 0, NotSerialized)
{ {
Return (^^XBCL()) Return (^^XBCL())
} }
*/ */
acpigen_write_method("_BCL", 0); acpigen_write_method("_BCL", 0);
@@ -83,7 +83,7 @@ drivers_intel_gma_displays_ssdt_generate(const struct i915_gpu_controller_info *
/* /*
Method (_BCM, 1, NotSerialized) Method (_BCM, 1, NotSerialized)
{ {
^^XBCM(Arg0) ^^XBCM(Arg0)
} }
*/ */
acpigen_write_method("_BCM", 1); acpigen_write_method("_BCM", 1);
@@ -94,7 +94,7 @@ drivers_intel_gma_displays_ssdt_generate(const struct i915_gpu_controller_info *
/* /*
Method (_BQC, 0, NotSerialized) Method (_BQC, 0, NotSerialized)
{ {
Return (^^XBQC()) Return (^^XBQC())
} }
*/ */
acpigen_write_method("_BQC", 0); acpigen_write_method("_BQC", 0);

2
src/drivers/net/ne2k.c
View File

@@ -437,7 +437,7 @@ static void read_resources(struct device *dev)
res->gran = 5; res->gran = 5;
res->limit = res->base + res->size - 1; res->limit = res->base + res->size - 1;
res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_STORED | res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_STORED |
IORESOURCE_ASSIGNED; IORESOURCE_ASSIGNED;
return; return;
} }

20
src/drivers/xgi/common/initdef.h
View File

@@ -42,7 +42,7 @@
* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
* Author: Thomas Winischhofer <thomas@winischhofer.net> * Author: Thomas Winischhofer <thomas@winischhofer.net>
* *
*/ */
@@ -80,7 +80,7 @@
#define VB_SIS307T 0x0080 #define VB_SIS307T 0x0080
#define VB_SIS307LV 0x0100 #define VB_SIS307LV 0x0100
#define VB_UMC 0x4000 #define VB_UMC 0x4000
#define VB_NoLCD 0x8000 #define VB_NoLCD 0x8000
#define VB_SIS30xB (VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T) #define VB_SIS30xB (VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T)
#define VB_SIS30xC (VB_SIS301C | VB_SIS307T) #define VB_SIS30xC (VB_SIS301C | VB_SIS307T)
#define VB_SISTMDS (VB_SIS301 | VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T) #define VB_SISTMDS (VB_SIS301 | VB_SIS301B | VB_SIS301C | VB_SIS302B | VB_SIS307T)
@@ -110,10 +110,10 @@
#define SetCRT2ToSCART 0x0010 #define SetCRT2ToSCART 0x0010
#define SetCRT2ToLCD 0x0020 #define SetCRT2ToLCD 0x0020
#define SetCRT2ToRAMDAC 0x0040 #define SetCRT2ToRAMDAC 0x0040
#define SetCRT2ToHiVision 0x0080 /* for SiS bridge */ #define SetCRT2ToHiVision 0x0080 /* for SiS bridge */
#define SetCRT2ToCHYPbPr SetCRT2ToHiVision /* for Chrontel */ #define SetCRT2ToCHYPbPr SetCRT2ToHiVision /* for Chrontel */
#define SetNTSCTV 0x0000 /* CR 31 */ #define SetNTSCTV 0x0000 /* CR 31 */
#define SetPALTV 0x0100 /* Deprecated here, now in TVMode */ #define SetPALTV 0x0100 /* Deprecated here, now in TVMode */
#define SetInSlaveMode 0x0200 #define SetInSlaveMode 0x0200
#define SetNotSimuMode 0x0400 #define SetNotSimuMode 0x0400
#define SetNotSimuTVMode SetNotSimuMode #define SetNotSimuTVMode SetNotSimuMode
@@ -128,7 +128,7 @@
/* v-- Needs change in sis_vga.c if changed (GPIO) --v */ /* v-- Needs change in sis_vga.c if changed (GPIO) --v */
#define SetCRT2ToTV (SetCRT2ToYPbPr525750|SetCRT2ToHiVision|SetCRT2ToSCART|SetCRT2ToSVIDEO|SetCRT2ToAVIDEO) #define SetCRT2ToTV (SetCRT2ToYPbPr525750|SetCRT2ToHiVision|SetCRT2ToSCART|SetCRT2ToSVIDEO|SetCRT2ToAVIDEO)
#define SetCRT2ToTVNoYPbPrHiVision (SetCRT2ToSCART | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO) #define SetCRT2ToTVNoYPbPrHiVision (SetCRT2ToSCART | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)
#define SetCRT2ToTVNoHiVision (SetCRT2ToYPbPr525750 | SetCRT2ToSCART | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO) #define SetCRT2ToTVNoHiVision (SetCRT2ToYPbPr525750 | SetCRT2ToSCART | SetCRT2ToSVIDEO | SetCRT2ToAVIDEO)
/* SiS_ModeType */ /* SiS_ModeType */
#define ModeText 0x00 #define ModeText 0x00
@@ -159,7 +159,7 @@
/* Infoflag */ /* Infoflag */
#define SupportTV 0x0008 #define SupportTV 0x0008
#define SupportTV1024 0x0800 #define SupportTV1024 0x0800
#define SupportCHTV 0x0800 #define SupportCHTV 0x0800
#define Support64048060Hz 0x0800 /* Special for 640x480 LCD */ #define Support64048060Hz 0x0800 /* Special for 640x480 LCD */
#define SupportHiVision 0x0010 #define SupportHiVision 0x0010
#define SupportYPbPr750p 0x1000 #define SupportYPbPr750p 0x1000
@@ -297,7 +297,7 @@
#define LCDSyncShift 6 #define LCDSyncShift 6
/* CR38 (315 series) */ /* CR38 (315 series) */
#define EnableDualEdge 0x01 #define EnableDualEdge 0x01
#define SetToLCDA 0x02 /* LCD channel A (301C/302B/30x(E)LV and 650+LVDS only) */ #define SetToLCDA 0x02 /* LCD channel A (301C/302B/30x(E)LV and 650+LVDS only) */
#define EnableCHScart 0x04 /* Scart on Ch7019 (unofficial definition - TW) */ #define EnableCHScart 0x04 /* Scart on Ch7019 (unofficial definition - TW) */
#define EnableCHYPbPr 0x08 /* YPbPr on Ch7019 (480i HDTV); only on 650/Ch7019 systems */ #define EnableCHYPbPr 0x08 /* YPbPr on Ch7019 (480i HDTV); only on 650/Ch7019 systems */
@@ -605,7 +605,7 @@
#define _PanelType0E 0x70 #define _PanelType0E 0x70
#define _PanelType0F 0x78 #define _PanelType0F 0x78
#define PRIMARY_VGA 0 /* 1: SiS is primary vga 0:SiS is secondary vga */ #define PRIMARY_VGA 0 /* 1: SiS is primary vga 0:SiS is secondary vga */
#define BIOSIDCodeAddr 0x235 /* Offsets to ptrs in BIOS image */ #define BIOSIDCodeAddr 0x235 /* Offsets to ptrs in BIOS image */
#define OEMUtilIDCodeAddr 0x237 #define OEMUtilIDCodeAddr 0x237
@@ -650,7 +650,7 @@
/* /*
============================================================= =============================================================
for 315 series (old data layout) for 315 series (old data layout)
============================================================= =============================================================
*/ */
#define SoftDRAMType 0x80 #define SoftDRAMType 0x80

4
src/drivers/xgi/common/vstruct.h
View File

@@ -42,7 +42,7 @@
* * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF * * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
* Author: Thomas Winischhofer <thomas@winischhofer.net> * Author: Thomas Winischhofer <thomas@winischhofer.net>
* *
*/ */
@@ -230,7 +230,7 @@ struct SiS_Private
unsigned char ChipType; unsigned char ChipType;
unsigned char ChipRevision; unsigned char ChipRevision;
void *ivideo; void *ivideo;
unsigned char *VirtualRomBase; unsigned char *VirtualRomBase;
bool UseROM; bool UseROM;
unsigned char SISIOMEMTYPE *VideoMemoryAddress; unsigned char SISIOMEMTYPE *VideoMemoryAddress;
unsigned int VideoMemorySize; unsigned int VideoMemorySize;