diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c
index 9a3ca3a967..a3e69fcc87 100644
--- a/src/southbridge/amd/cimx/sb800/cfg.c
+++ b/src/southbridge/amd/cimx/sb800/cfg.c
@@ -84,7 +84,7 @@ void sb800_cimx_config(AMDSBCFG *sb_config)
 	sb_config->USBMODE.UsbModeReg = USB_CONFIG;
 	sb_config->SbUsbPll = 0;
 	/* CG PLL multiplier for USB Rx 1.1 mode (0=disable, 1=enable) */
-	sb_config->UsbRxMode = 1;
+	sb_config->UsbRxMode = USB_RX_MODE;
 
 	/* SATA */
 	sb_config->SataClass = SATA_MODE;
diff --git a/src/vendorcode/amd/cimx/sb800/OEM.h b/src/vendorcode/amd/cimx/sb800/OEM.h
index 36ba33b41f..d81f93c370 100644
--- a/src/vendorcode/amd/cimx/sb800/OEM.h
+++ b/src/vendorcode/amd/cimx/sb800/OEM.h
@@ -284,6 +284,14 @@
   #define USB_PLL_Voltage              0x10
 #endif
 
+/**
+ * USB_RX_MODE - Enable CG2 clock voltage setting.
+ *
+ */
+#ifndef USB_RX_MODE
+  #define USB_RX_MODE                  0x01
+#endif
+
 /**
  * Spread_Spectrum_Type
  *