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remove some amd mainboard warnings.

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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5391 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-04-09 11:55:43 +00:00 committed by Stefan Reinauer
parent c666a64395
commit 0e34aeffd3
4 changed files with 11 additions and 17 deletions
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2
src/mainboard/amd/dbm690t/acpi_tables.c
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@ -92,8 +92,6 @@ unsigned long acpi_fill_madt(unsigned long current)
return current; return current;
} }
static void update_ssdtx(void *ssdtx, int i) static void update_ssdtx(void *ssdtx, int i)
{ {
uint8_t *PCI; uint8_t *PCI;

13
src/mainboard/amd/dbm690t/mainboard.c
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@ -22,6 +22,7 @@
#include <device/pci.h> #include <device/pci.h>
#include <arch/io.h> #include <arch/io.h>
#include <boot/coreboot_tables.h> #include <boot/coreboot_tables.h>
#include <arch/coreboot_tables.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h> #include <cpu/amd/mtrr.h>
#include <device/pci_def.h> #include <device/pci_def.h>
@ -57,7 +58,7 @@ uint64_t uma_memory_base, uma_memory_size;
* RRG4.2.3.1 GPM pins as Input * RRG4.2.3.1 GPM pins as Input
* RRG4.2.3.2 GPM pins as Output * RRG4.2.3.2 GPM pins as Output
********************************************************/ ********************************************************/
static void enable_onboard_nic() static void enable_onboard_nic(void)
{ {
u8 byte; u8 byte;
@ -94,7 +95,7 @@ static void enable_onboard_nic()
* IDE_DMA66 is routed to GPIO 9. So we read Gpio 9 to * IDE_DMA66 is routed to GPIO 9. So we read Gpio 9 to
* get the cable type, 40 pin or 80 pin? * get the cable type, 40 pin or 80 pin?
********************************************************/ ********************************************************/
static void get_ide_dma66() static void get_ide_dma66(void)
{ {
u8 byte; u8 byte;
struct device *sm_dev; struct device *sm_dev;
@ -120,7 +121,7 @@ static void get_ide_dma66()
/* /*
* set thermal config * set thermal config
*/ */
static void set_thermal_config() static void set_thermal_config(void)
{ {
u8 byte; u8 byte;
u16 word; u16 word;
@ -185,11 +186,8 @@ static void set_thermal_config()
* enable the dedicated function in dbm690t board. * enable the dedicated function in dbm690t board.
* This function called early than rs690_enable. * This function called early than rs690_enable.
*************************************************/ *************************************************/
void dbm690t_enable(device_t dev) static void dbm690t_enable(device_t dev)
{ {
struct mainboard_config *mainboard =
(struct mainboard_config *)dev->chip_info;
printk(BIOS_INFO, "Mainboard DBM690T Enable. dev=0x%p\n", dev); printk(BIOS_INFO, "Mainboard DBM690T Enable. dev=0x%p\n", dev);
#if (CONFIG_GFXUMA == 1) #if (CONFIG_GFXUMA == 1)
@ -249,6 +247,7 @@ int add_mainboard_resources(struct lb_memory *mem)
lb_add_memory_range(mem, LB_MEM_RESERVED, lb_add_memory_range(mem, LB_MEM_RESERVED,
uma_memory_base, uma_memory_size); uma_memory_base, uma_memory_size);
#endif #endif
return 0;
} }
struct chip_operations mainboard_ops = { struct chip_operations mainboard_ops = {

2
src/mainboard/amd/mahogany/get_bus_conf.c
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@ -63,8 +63,6 @@ u32 sbdn_sb700;
static u32 get_bus_conf_done = 0; static u32 get_bus_conf_done = 0;
void get_bus_conf(void);
void get_bus_conf(void) void get_bus_conf(void)
{ {
u32 apicid_base; u32 apicid_base;

11
src/mainboard/amd/pistachio/mainboard.c
View File

@ -22,6 +22,7 @@
#include <device/pci.h> #include <device/pci.h>
#include <arch/io.h> #include <arch/io.h>
#include <boot/coreboot_tables.h> #include <boot/coreboot_tables.h>
#include <arch/coreboot_tables.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#include <cpu/amd/mtrr.h> #include <cpu/amd/mtrr.h>
#include <device/pci_def.h> #include <device/pci_def.h>
@ -57,7 +58,7 @@ uint64_t uma_memory_base, uma_memory_size;
* The R77 (on BRASS) / R81 (on Bronze) is not load! * The R77 (on BRASS) / R81 (on Bronze) is not load!
* So NIC can work whether this function runs. * So NIC can work whether this function runs.
********************************************************/ ********************************************************/
static void enable_onboard_nic() static void enable_onboard_nic(void)
{ {
u8 byte; u8 byte;
@ -77,7 +78,7 @@ static void enable_onboard_nic()
/* /*
* set thermal config * set thermal config
*/ */
static void set_thermal_config() static void set_thermal_config(void)
{ {
u8 byte, byte2; u8 byte, byte2;
u16 word; u16 word;
@ -256,11 +257,8 @@ static void set_thermal_config()
* enable the dedicated function in pistachio board. * enable the dedicated function in pistachio board.
* This function called early than rs690_enable. * This function called early than rs690_enable.
*************************************************/ *************************************************/
void pistachio_enable(device_t dev) static void pistachio_enable(device_t dev)
{ {
struct mainboard_config *mainboard =
(struct mainboard_config *)dev->chip_info;
printk(BIOS_INFO, "Mainboard Pistachio Enable. dev=0x%p\n", dev); printk(BIOS_INFO, "Mainboard Pistachio Enable. dev=0x%p\n", dev);
#if (CONFIG_GFXUMA == 1) #if (CONFIG_GFXUMA == 1)
@ -320,6 +318,7 @@ int add_mainboard_resources(struct lb_memory *mem)
lb_add_memory_range(mem, LB_MEM_RESERVED, lb_add_memory_range(mem, LB_MEM_RESERVED,
uma_memory_base, uma_memory_size); uma_memory_base, uma_memory_size);
#endif #endif
return 0;
} }
struct chip_operations mainboard_ops = { struct chip_operations mainboard_ops = {