smi: Update mainboard_smi_gpi() to have 32bit argument

With the LynxPoint chipset there are more than 16
possible GPIOs that can trigger an SMI so we need
a mainboard handler that can support this.

There are only a handful of users of this function
so just change them all to use the new prototype.

Change-Id: I3d96da0397d6584f713fcf6003054b25c1c92939
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49530
Reviewed-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/4145
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>

src/cpu/x86/smm/smm_module_handler.c

@@ -165,6 +165,6 @@ int __attribute__((weak)) mainboard_io_trap_handler(int smif) { return 0; }
 void __attribute__((weak)) cpu_smi_handler(void) {}
 void __attribute__((weak)) northbridge_smi_handler() {}
 void __attribute__((weak)) southbridge_smi_handler() {}
-void __attribute__((weak)) mainboard_smi_gpi(u16 gpi_sts) {}
+void __attribute__((weak)) mainboard_smi_gpi(u32 gpi_sts) {}
 int __attribute__((weak)) mainboard_smi_apmc(u8 data) { return 0; }
 void __attribute__((weak)) mainboard_smi_sleep(u8 slp_typ) {}