soc/intel/quark: Add FSP 2.0 boot block support

Add the pieces necessary to successfully build and run bootblock using
the FSP 2.0 build.

TEST=Build and run bootblock on Galileo Gen2

Change-Id: I2377f0b0147196f100396b8cd7eaca8f92d6932f
Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Reviewed-on: https://review.coreboot.org/15865
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>

src/mainboard/intel/galileo/Kconfig

@@ -54,7 +54,7 @@ config USE_FSP1_1
 config USE_FSP2_0
 	bool
 	default n
+	select BOOTBLOCK_CONSOLE
 	select PLATFORM_USES_FSP2_0
-	select POSTCAR_STAGE
 
 endif # BOARD_INTEL_QUARK

src/mainboard/intel/galileo/Makefile.inc

@@ -23,5 +23,8 @@ bootblock-y += reg_access.c
 romstage-y += gpio.c
 romstage-y += reg_access.c
 
+postcar-y += gpio.c
+postcar-y += reg_access.c
+
 ramstage-y += gpio.c
 ramstage-y += reg_access.c

src/mainboard/intel/galileo/gpio.c

@@ -15,7 +15,7 @@
 
 #include <arch/io.h>
 #include <console/console.h>
-#include <fsp/romstage.h>
+#include <soc/car.h>
 #include <soc/ramstage.h>
 #include "reg_access.h"
 #include "gen1.h"
@@ -37,7 +37,8 @@ void car_mainboard_pre_console_init(void)
 		if (IS_ENABLED(CONFIG_GALILEO_GEN2))
 			script = gen2_hsuart0;
 		else
-			script = (reg_legacy_gpio_read (R_QNC_GPIO_RGLVL_RESUME_WELL)
+			script = (reg_legacy_gpio_read(
+				R_QNC_GPIO_RGLVL_RESUME_WELL)
 				& GALILEO_DETERMINE_IOEXP_SLA_RESUMEWELL_GPIO)
 				? gen1_hsuart0_0x20 : gen1_hsuart0_0x21;
 		reg_script_run(script);

src/mainboard/intel/galileo/romstage.c

@@ -14,6 +14,7 @@
  * GNU General Public License for more details.
  */
 
+#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1)
 #include <fsp/romstage.h>
 
 /* All FSP specific code goes in this block */
@@ -22,3 +23,4 @@ void mainboard_romstage_entry(struct romstage_params *rp)
 	/* Call back into chipset code with platform values updated. */
 	romstage_common(rp);
 }
+#endif /* IS_ENABLED(CONFIG_PLATFORM_USES_FSP1_1) */