arm64: remove spin table support
As ARM Trusted Firmware is the only first class citizen for booting arm64 multi-processor in coreboot remove spintable support. If SoCs want to bring up MP then ATF needs to be ported and integrated. Change-Id: I1f38b8d8b0952eee50cc64440bfd010b1dd0bff4 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/11908 Tested-by: build bot (Jenkins) Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Aaron Durbin
committed by
Julius Werner
Julius Werner
parent
0325a45fd0
commit
1148786c05
@@ -28,11 +28,6 @@ config ARM64_BOOTBLOCK_CUSTOM
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bool
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default n
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config ARM64_USE_SPINTABLE
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bool
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default n
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depends on ARCH_RAMSTAGE_ARM64
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config ARM64_USE_ARM_TRUSTED_FIRMWARE
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bool
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default n
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@@ -142,7 +142,6 @@ ramstage-y += memcpy.S
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ramstage-y += memmove.S
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ramstage-y += stage_entry.S
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ramstage-y += cpu-stubs.c
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ramstage-$(CONFIG_ARM64_USE_SPINTABLE) += spintable.c spintable_asm.S
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ramstage-$(CONFIG_ARM64_USE_ARM_TRUSTED_FIRMWARE) += arm_tf.c
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ramstage-y += transition.c transition_asm.S
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@@ -16,7 +16,6 @@
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#include <arch/cache.h>
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#include <arch/lib_helpers.h>
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#include <arch/stages.h>
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#include <arch/spintable.h>
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#include <arch/transition.h>
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#include <arm_tf.h>
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#include <cbmem.h>
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@@ -39,10 +38,6 @@ static void run_payload(struct prog *prog)
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else {
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uint8_t current_el = get_current_el();
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/* Start the other CPUs spinning. */
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if (IS_ENABLED(CONFIG_ARM64_USE_SPINTABLE))
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spintable_start();
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cache_sync_instructions();
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printk(BIOS_SPEW, "entry = %p\n", doit);
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@@ -1,45 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __ARCH_SPINTABLE_H__
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#define __ARCH_SPINTABLE_H__
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struct spintable_attributes {
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void (*entry)(void *);
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void *addr;
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};
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#if IS_ENABLED(CONFIG_ARM64_USE_SPINTABLE)
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/* Initialize spintable with provided monitor address. */
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void spintable_init(void *monitor_address);
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/* Return NULL on failure, otherwise the spintable info. */
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const struct spintable_attributes *spintable_get_attributes(void);
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#else /* IS_ENABLED(CONFIG_ARM64_USE_SPINTABLE) */
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static inline void spintable_init(void *monitor_address) {}
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static inline const struct spintable_attributes *spintable_get_attributes(void)
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{
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return NULL;
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}
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#endif /* IS_ENABLED(CONFIG_ARM64_USE_SPINTABLE) */
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/* Start spinning on the non-boot CPUs. */
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void spintable_start(void);
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#endif /* __ARCH_SPINTABLE_H__ */
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@@ -1,96 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/cache.h>
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#include <arch/spintable.h>
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#include <arch/transition.h>
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#include <console/console.h>
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#include <cpu/cpu.h>
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#include <cbmem.h>
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#include <string.h>
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static struct spintable_attributes spin_attrs;
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void spintable_init(void *monitor_address)
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{
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extern void __wait_for_spin_table_request(void);
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const size_t code_size = 4096;
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if (monitor_address == NULL) {
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printk(BIOS_ERR, "spintable: NULL address to monitor.\n");
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return;
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}
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spin_attrs.entry = cbmem_add(CBMEM_ID_SPINTABLE, code_size);
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if (spin_attrs.entry == NULL)
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return;
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spin_attrs.addr = monitor_address;
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printk(BIOS_INFO, "spintable @ %p will monitor %p\n",
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spin_attrs.entry, spin_attrs.addr);
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/* Ensure the memory location is zero'd out. */
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*(uint64_t *)monitor_address = 0;
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memcpy(spin_attrs.entry, __wait_for_spin_table_request, code_size);
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dcache_clean_invalidate_by_mva(monitor_address, sizeof(uint64_t));
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dcache_clean_invalidate_by_mva(spin_attrs.entry, code_size);
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}
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static void spintable_enter(void *unused)
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{
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struct exc_state state;
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const struct spintable_attributes *attrs;
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int current_el;
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attrs = spintable_get_attributes();
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current_el = get_current_el();
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if (current_el != EL3)
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attrs->entry(attrs->addr);
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memset(&state, 0, sizeof(state));
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state.elx.spsr = get_eret_el(EL2, SPSR_USE_L);
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transition_with_entry(attrs->entry, attrs->addr, &state);
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}
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const struct spintable_attributes *spintable_get_attributes(void)
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{
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if (spin_attrs.entry == NULL) {
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printk(BIOS_ERR, "spintable: monitor code not present.\n");
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return NULL;
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}
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return &spin_attrs;
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}
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void spintable_start(void)
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{
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struct cpu_action action = {
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.run = spintable_enter,
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};
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if (spintable_get_attributes() == NULL)
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return;
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printk(BIOS_INFO, "All non-boot CPUs to enter spintable.\n");
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arch_run_on_all_cpus_but_self_async(&action);
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}
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@@ -1,34 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <arch/asm.h>
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ENTRY(__wait_for_spin_table_request)
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/* Entry here is in EL2 with the magic address in x0. */
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mov x28, x0
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1:
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ldr x27, [x28]
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cmp x27, xzr
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b.ne 2f
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wfe
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b 1b
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2:
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/* Entry into the kernel. */
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mov x0, xzr
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mov x1, xzr
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mov x2, xzr
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mov x3, xzr
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br x27
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ENDPROC(__wait_for_spin_table_request)
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