soc/amd/cezanne: factor out AOAC offset defines

Factoring out those defines allows using them easily in the ACPI code
without having to use preprocessor macros.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib9dfddb0d4f32a542fa652ff8c14e932c224f247
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55533
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Raul Rangel <rrangel@chromium.org>

src/soc/amd/cezanne/aoac.c

@@ -3,6 +3,7 @@
 #include <stdint.h>
 #include <amdblocks/acpimmio.h>
 #include <amdblocks/aoac.h>
+#include <soc/aoac_defs.h>
 #include <soc/southbridge.h>
 #include <delay.h>
 

src/soc/amd/cezanne/include/soc/aoac_defs.h

@@ -0,0 +1,21 @@
+
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef AMD_CEZANNE_AOAC_DEFS_H
+#define AMD_CEZANNE_AOAC_DEFS_H
+
+/* FCH AOAC device offsets for AOAC_DEV_D3_CTL/AOAC_DEV_D3_STATE */
+#define FCH_AOAC_DEV_CLK_GEN		0
+#define FCH_AOAC_DEV_I2C0		5
+#define FCH_AOAC_DEV_I2C1		6
+#define FCH_AOAC_DEV_I2C2		7
+#define FCH_AOAC_DEV_I2C3		8
+#define FCH_AOAC_DEV_I2C4		9
+#define FCH_AOAC_DEV_I2C5		10
+#define FCH_AOAC_DEV_UART0		11
+#define FCH_AOAC_DEV_UART1		12
+#define FCH_AOAC_DEV_AMBA		17
+#define FCH_AOAC_DEV_ESPI		27
+#define FCH_AOAC_DEV_EMMC		28
+
+#endif /* AMD_CEZANNE_AOAC_DEFS_H */

src/soc/amd/cezanne/include/soc/southbridge.h

@@ -105,20 +105,6 @@
 #define   I2C_PAD_CTRL_SPARE0		BIT(17)
 #define   I2C_PAD_CTRL_SPARE1		BIT(18)
 
-/* FCH AOAC device offsets for AOAC_DEV_D3_CTL/AOAC_DEV_D3_STATE */
-#define FCH_AOAC_DEV_CLK_GEN		0
-#define FCH_AOAC_DEV_I2C0		5
-#define FCH_AOAC_DEV_I2C1		6
-#define FCH_AOAC_DEV_I2C2		7
-#define FCH_AOAC_DEV_I2C3		8
-#define FCH_AOAC_DEV_I2C4		9
-#define FCH_AOAC_DEV_I2C5		10
-#define FCH_AOAC_DEV_UART0		11
-#define FCH_AOAC_DEV_UART1		12
-#define FCH_AOAC_DEV_AMBA		17
-#define FCH_AOAC_DEV_ESPI		27
-#define FCH_AOAC_DEV_EMMC		28
-
 void fch_pre_init(void);
 void fch_early_init(void);
 void fch_init(void *chip_info);

src/soc/amd/cezanne/uart.c

@@ -7,6 +7,7 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/mmio.h>
+#include <soc/aoac_defs.h>
 #include <soc/gpio.h>
 #include <soc/southbridge.h>
 #include <soc/uart.h>