vc/mediatek/mt8195: fix misleading-indentation error

Fix misleading-indentation error in dramc_pi_calibration_api.c.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I680e9e6fffaebb23bf1f156a7f614345e952ed95
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58136
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
This commit is contained in:
Rex-BC Chen 2021-10-06 20:26:58 +08:00 committed by Hung-Te Lin
parent dc9abea4fc
commit 1259da13e3

View File

@ -1040,11 +1040,11 @@ static void O1PathOnOff(DRAMC_CTX_T *p, U8 u1OnOff)
// VREF_UNTERM_EN
vIO32WriteFldAlign(DRAMC_REG_ADDR(DDRPHY_REG_SHU_B0_VREF), 1, SHU_B0_VREF_RG_RX_ARDQ_VREF_UNTERM_EN_B0);
if (!isLP4_DSC)
vIO32WriteFldAlign(DRAMC_REG_ADDR(DDRPHY_REG_SHU_B1_VREF), 1, SHU_B1_VREF_RG_RX_ARDQ_VREF_UNTERM_EN_B1);
vIO32WriteFldAlign(DRAMC_REG_ADDR(DDRPHY_REG_SHU_B1_VREF), 1, SHU_B1_VREF_RG_RX_ARDQ_VREF_UNTERM_EN_B1);
else
vIO32WriteFldAlign(DRAMC_REG_ADDR(DDRPHY_REG_SHU_CA_VREF), 1, SHU_CA_VREF_RG_RX_ARCA_VREF_UNTERM_EN_CA);
u1VrefSel = 0x37;//unterm LP4
u1VrefSel = 0x37;//unterm LP4
vIO32WriteFldMulti(DRAMC_REG_ADDR(DDRPHY_REG_SHU_B0_PHY_VREF_SEL),
P_Fld(u1VrefSel, SHU_B0_PHY_VREF_SEL_RG_RX_ARDQ_VREF_SEL_LB_B0) |