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mb/supermicro/x11-lga1151-series: add support of X11SSH-LN4F to X11SSH-F

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The X11SSH-LN4F and X11SSH-F are very similiar. They both use the same
PCB and use the same Supermicro BIOS ID. The X11SSH-LN4F has 4 NICs in
difference to the X11SSH-F which only has 2 NICs. The two additional
NICs aren't populated on the X11SSH-F. Enable the PCIe root ports
connected to the two additional Intel NICs.

Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Change-Id: Id4e66be47ceef75905ba760b8d5a14284e130f63
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51330
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
This commit is contained in:
Alexander Couzens
2021-02-27 23:58:56 +01:00
committed by Michael Niewöhner
parent 1d242799c2
commit 1295fa218f
6 changed files with 22 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/mainboard/supermicro/x11-lga1151-series/Kconfig
View File

@@ -25,7 +25,7 @@ config MAINBOARD_PART_NUMBER
string
default "X11SSH-TF" if BOARD_SUPERMICRO_X11SSH_TF
default "X11SSM-F" if BOARD_SUPERMICRO_X11SSM_F
default "X11SSH-F" if BOARD_SUPERMICRO_X11SSH_F
default "X11SSH-F/LN4F" if BOARD_SUPERMICRO_X11SSH_F
config MAINBOARD_DIR
string

2
src/mainboard/supermicro/x11-lga1151-series/Kconfig.name
View File

@@ -7,5 +7,5 @@ config BOARD_SUPERMICRO_X11SSM_F
select BOARD_SUPERMICRO_BASEBOARD_X11_LGA1151_SERIES
config BOARD_SUPERMICRO_X11SSH_F
bool "X11SSH-F"
bool "X11SSH-F/LN4F"
select BOARD_SUPERMICRO_BASEBOARD_X11_LGA1151_SERIES

8
src/mainboard/supermicro/x11-lga1151-series/variants/x11ssh-f/overridetree.cb
View File

@@ -67,6 +67,14 @@ chip soc/intel/skylake
register "PcieRpEnable[1]" = "1"
device pci 00.0 on end # GbE
end
device pci 1c.2 on # PCI Express Port 3 only on -LN4F
register "PcieRpEnable[2]" = "1"
device pci 00.0 on end # GbE
end
device pci 1c.3 on # PCI Express Port 4 only on -LN4F
register "PcieRpEnable[3]" = "1"
device pci 00.0 on end # GbE
end
device pci 1c.4 on # PCI Express Port 5
register "PcieRpEnable[4]" = "1"
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2 2280" "SlotDataBusWidth2X"