From 13338f9ae273b0d15e526f1f3699468600d6ab2b Mon Sep 17 00:00:00 2001 From: Jeremy Soller Date: Tue, 24 Nov 2020 12:31:22 -0700 Subject: [PATCH] Sync lemp10 iom config Change-Id: Ie7a07c1447a3b41d3b53d1198e86cf04b51f96bc --- src/mainboard/system76/galp5/ramstage.c | 3 +++ src/mainboard/system76/lemp10/devicetree.cb | 10 ---------- src/mainboard/system76/lemp10/ramstage.c | 3 +++ 3 files changed, 6 insertions(+), 10 deletions(-) diff --git a/src/mainboard/system76/galp5/ramstage.c b/src/mainboard/system76/galp5/ramstage.c index a580240404..f0985b38de 100644 --- a/src/mainboard/system76/galp5/ramstage.c +++ b/src/mainboard/system76/galp5/ramstage.c @@ -9,5 +9,8 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params) { params->CpuPcieRpLtrEnable[0] = 1; params->CpuPcieRpPtmEnabled[0] = 0; + // IOM config + params->PchUsbOverCurrentEnable = 0; + gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); } diff --git a/src/mainboard/system76/lemp10/devicetree.cb b/src/mainboard/system76/lemp10/devicetree.cb index 9c7c90bc32..3eed08b589 100644 --- a/src/mainboard/system76/lemp10/devicetree.cb +++ b/src/mainboard/system76/lemp10/devicetree.cb @@ -78,16 +78,6 @@ chip soc/intel/tigerlake .vnn_sx_voltage_mv = 1050, }" - # Default IOM Port Config - register "IomTypeCPortPadCfg[0]" = "0x09000000" - register "IomTypeCPortPadCfg[1]" = "0x09000000" - register "IomTypeCPortPadCfg[2]" = "0x09000000" - register "IomTypeCPortPadCfg[3]" = "0x09000000" - register "IomTypeCPortPadCfg[4]" = "0x09000000" - register "IomTypeCPortPadCfg[5]" = "0x09000000" - register "IomTypeCPortPadCfg[6]" = "0x09000000" - register "IomTypeCPortPadCfg[7]" = "0x09000000" - # Read LPM_EN, make sure to invert the bits # sudo devmem2 0xfe001c78 # 0x9 diff --git a/src/mainboard/system76/lemp10/ramstage.c b/src/mainboard/system76/lemp10/ramstage.c index a580240404..f0985b38de 100644 --- a/src/mainboard/system76/lemp10/ramstage.c +++ b/src/mainboard/system76/lemp10/ramstage.c @@ -9,5 +9,8 @@ void mainboard_silicon_init_params(FSP_S_CONFIG *params) { params->CpuPcieRpLtrEnable[0] = 1; params->CpuPcieRpPtmEnabled[0] = 0; + // IOM config + params->PchUsbOverCurrentEnable = 0; + gpio_configure_pads(gpio_table, ARRAY_SIZE(gpio_table)); }