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util/inteltool: add support for EBG (Emmitsburg) PCH

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EBG (Emmitsburg) PCH is used in Intel SPR-SP chipset.

Its datasheet is Intel doc# 606161.

Add Intel Emmitsburg PCH GPIO pin definitions.

Also common code change is made to support Intel Emmitsburg PCH:
a. Instead of 2 PAD registers per GPIO, it has 4 PAD registers.
b. The register address space may not be contiguous from one GPIO
group to the next GPIO group.

Change-Id: Ia0d9179544020b6abb0be1ecd275a9a46356db8a
Signed-off-by: Jonathan Zhang <jonzhang@meta.com>
Signed-off-by: Christian Walter <christian.walter@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71943
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: David Hendricks <david.hendricks@gmail.com>
This commit is contained in:
Christian Walter
2022-09-08 11:44:19 +02:00
committed by Felix Held
parent b53e27bc24
commit 1364ac3478
5 changed files with 454 additions and 0 deletions
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7
util/inteltool/gpio_groups.c
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@ -17,6 +17,7 @@
#include "gpio_names/geminilake.h"
#include "gpio_names/icelake.h"
#include "gpio_names/lewisburg.h"
#include "gpio_names/emmitsburg.h"
#include "gpio_names/sunrise.h"
#include "gpio_names/tigerlake.h"
#include "gpio_names/alderlake_h.h"
@ -82,6 +83,8 @@ static void print_gpio_community(const struct gpio_community *const community,
}
for (group = 0; group < community->group_count; ++group) {
if (community->groups[group]->pad_offset)
pad_cfg = community->groups[group]->pad_offset;
print_gpio_group(community->pcr_port_id,
pad_cfg, community->groups[group],
pad_stepping);
@ -150,6 +153,10 @@ const struct gpio_community *const *get_gpio_communities(struct pci_dev *const s
case PCI_DEVICE_ID_INTEL_C629A_SUPER:
*community_count = ARRAY_SIZE(lewisburg_communities);
return lewisburg_communities;
case PCI_DEVICE_ID_INTEL_EBG:
*pad_stepping = 16;
*community_count = ARRAY_SIZE(emmitsburg_communities);
return emmitsburg_communities;
case PCI_DEVICE_ID_INTEL_DNV_LPC:
*community_count = ARRAY_SIZE(denverton_communities);
return denverton_communities;