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drivers/intel/fsp1_1: Configure UART after memory init

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FSP code will default enable the onboard serial port.
When external serial port is used, this onboard port needs to be
disabled.

Add function mainboard_after_memory_init() function to perform
required actions to re-enabled output to external serial port.

BUG=N/A
TEST=LPC Post card on Intel Cherry Hill

Change-Id: Ibb6c9e4153b3de58791b211c7f4241be3bceae9d
Signed-off-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/28464
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Frans Hendriks
2019-04-05 13:42:14 +02:00
committed by Patrick Georgi
parent dd11810367
commit 1385b7dd10
2 changed files with 9 additions and 0 deletions
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7
src/drivers/intel/fsp1_1/raminit.c
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@ -125,6 +125,7 @@ void raminit(struct romstage_params *params)
timestamp_add_now(TS_FSP_MEMORY_INIT_START);
post_code(POST_FSP_MEMORY_INIT);
status = fsp_memory_init(&fsp_memory_init_params);
mainboard_after_memory_init();
post_code(0x37);
timestamp_add_now(TS_FSP_MEMORY_INIT_END);
@ -322,3 +323,9 @@ __weak void soc_memory_init_params(
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}
/* Initialize the SoC after MemoryInit */
__weak void mainboard_after_memory_init(void)
{
printk(BIOS_DEBUG, "WEAK: %s/%s called\n", __FILE__, __func__);
}