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Braswell: Modify CB to accomodate new FSPv83

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Latest FSPv83 made some change related to UPD/VPD
need this patch to align those

BUG=None
TEST=Build and Boot Cyan System
BRANCH=strago-7287.B
CQ-DEPEND=CL:*226897

Original-Change-Id: I6395f3a1f4eecaef14fc4720b00252f9e6143fa3
Original-Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/291394
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: Hannah Williams <hannah.williams@intel.com>
Original-Commit-Queue: Hannah Williams <hannah.williams@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/303137
Original-Commit-Ready: John Zhao <john.zhao@intel.com>
Original-Tested-by: John Zhao <john.zhao@intel.com>

Change-Id: I9920eea84b802699454850bfde489668201ffeb6
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/11813
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Subrata Banik
2015-08-07 18:22:54 +05:30
committed by Aaron Durbin
parent 951f2d3ebb
commit 13cd3310a5
3 changed files with 7 additions and 11 deletions
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2
src/soc/intel/common/vbt.c
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@ -47,5 +47,5 @@ void load_vbt(uint8_t s3_resume, SILICON_INIT_UPD *params)
} else
vbt_data = NULL;
}
params->PcdGraphicsConfigPtr = (u32)vbt_data;
params->GraphicsConfigPtr = (u32)vbt_data;
}