arch/x86: Change smm_subregion() prototype
Do this to avoid some amount of explicit typecasting that would be required otherwise. Change-Id: I5bc2c3c1dd579f7c6c3d3354c0691e4ba3c778e1 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34706 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@@ -172,11 +172,7 @@ void smm_relocation_handler(int cpu, uintptr_t curr_smbase,
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static void fill_in_relocation_params(struct smm_relocation_params *params)
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{
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void *handler_base;
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size_t handler_size;
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void *ied_base;
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size_t ied_size;
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void *tseg_base;
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uintptr_t tseg_base;
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size_t tseg_size;
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u32 emrr_base;
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u32 emrr_size;
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@@ -191,14 +187,8 @@ static void fill_in_relocation_params(struct smm_relocation_params *params)
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phys_bits = cpu_phys_address_size();
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smm_region(&tseg_base, &tseg_size);
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smm_subregion(SMM_SUBREGION_HANDLER, &handler_base, &handler_size);
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smm_subregion(SMM_SUBREGION_CHIPSET, &ied_base, &ied_size);
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params->smram_size = handler_size;
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params->smram_base = (uintptr_t)handler_base;
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params->ied_base = (uintptr_t)ied_base;
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params->ied_size = ied_size;
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smm_subregion(SMM_SUBREGION_HANDLER, ¶ms->smram_base, ¶ms->smram_size);
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smm_subregion(SMM_SUBREGION_CHIPSET, ¶ms->ied_base, ¶ms->ied_size);
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/* SMRR has 32-bits of valid address aligned to 4KiB. */
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params->smrr_base.lo = (params->smram_base & rmask) | MTRR_TYPE_WRBACK;
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@@ -241,8 +231,8 @@ static void setup_ied_area(struct smm_relocation_params *params)
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ied_base = (void *)params->ied_base;
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printk(BIOS_DEBUG, "IED base = 0x%08x\n", params->ied_base);
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printk(BIOS_DEBUG, "IED size = 0x%08x\n", params->ied_size);
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printk(BIOS_DEBUG, "IED base = 0x%08x\n", (u32)params->ied_base);
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printk(BIOS_DEBUG, "IED size = 0x%08x\n", (u32)params->ied_size);
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/* Place IED header at IEDBASE. */
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memcpy(ied_base, &ied, sizeof(ied));
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