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cpu/x86: Fix MSR_PLATFORM_INFO definition

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While common to many Intel CPUs, this is not an architectural
MSR that should be globally defined for all x86.

Change-Id: Ibeed022dc2ba2e90f71511f9bd2640a7cafa5292
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34090
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: David Guckian
This commit is contained in:
Kyösti Mälkki 2019-07-01 08:54:56 +03:00
parent b29da7f79e
commit 142b10ee1f
2 changed files with 2 additions and 2 deletions
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2
src/include/cpu/x86/tsc.h
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@ -11,8 +11,6 @@
#define TSC_SYNC #define TSC_SYNC
#endif #endif
#define MSR_PLATFORM_INFO 0xce
struct tsc_struct { struct tsc_struct {
unsigned int lo; unsigned int lo;
unsigned int hi; unsigned int hi;

2
src/northbridge/intel/fsp_rangeley/udelay.c
View File

@ -18,6 +18,8 @@
#include <cpu/x86/tsc.h> #include <cpu/x86/tsc.h>
#include <cpu/x86/msr.h> #include <cpu/x86/msr.h>
#define MSR_PLATFORM_INFO 0xce
/** /**
* Intel Rangeley CPUs always run the TSC at BCLK = 100MHz * Intel Rangeley CPUs always run the TSC at BCLK = 100MHz
*/ */