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mb/starlabs/starbook/kbl: Use chipset.cb aliases

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Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I2da15db3d7fba4396c74800e531476c108cafe17
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67421
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes
2022-09-07 16:39:44 +01:00
committed by Felix Held
parent 558eafd5b0
commit 148f075264
1 changed files with 14 additions and 44 deletions
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58
src/mainboard/starlabs/starbook/variants/kbl/devicetree.cb
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@@ -54,10 +54,9 @@ chip soc/intel/skylake
end end
device domain 0 on device domain 0 on
device pci 00.0 on end # Host Bridge device ref igpu on end
device pci 02.0 on end # Integrated Graphics Device device ref sa_thermal on end
device pci 04.0 on end # SA Thermal Device device ref south_xhci on
device pci 14.0 on # USB xHCI
# Motherboard USB Type C # Motherboard USB Type C
register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)"
register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)" register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC_SKIP)"
@@ -79,9 +78,8 @@ chip soc/intel/skylake
# Webcam # Webcam
register "usb2_ports[CONFIG_CCD_PORT]" = "USB2_PORT_MID(OC_SKIP)" register "usb2_ports[CONFIG_CCD_PORT]" = "USB2_PORT_MID(OC_SKIP)"
end end
device pci 14.1 off end # USB xDCI (OTG) device ref thermal on end
device pci 14.2 on end # Thermal Subsystem device ref i2c0 on
device pci 15.0 on # I2C #0
chip drivers/i2c/hid chip drivers/i2c/hid
register "generic.hid" = ""STAR0001"" register "generic.hid" = ""STAR0001""
register "generic.desc" = ""Touchpad"" register "generic.desc" = ""Touchpad""
@@ -91,29 +89,15 @@ chip soc/intel/skylake
device i2c 2c on end device i2c 2c on end
end end
end end
device pci 15.1 off end # I2C1 device ref heci1 on end
device pci 15.2 off end # I2C2 device ref sata on
device pci 15.3 off end # I2C3
device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT Redirection
device pci 16.4 off end # Management Engine Interface 3
device pci 17.0 on # SATA
register "SataSalpSupport" = "1" register "SataSalpSupport" = "1"
# Port 1 # Port 1
register "SataPortsEnable[1]" = "1" register "SataPortsEnable[1]" = "1"
register "SataPortsDevSlp[1]" = "1" register "SataPortsDevSlp[1]" = "1"
end end
device pci 19.0 on end # UART #2 device ref uart2 on end
device pci 19.1 off end # I2C4 device ref pcie_rp6 on
device pci 19.2 off end # I2C5
device pci 1c.0 off end # PCI Express Port 1
device pci 1c.1 off end # PCI Express Port 2
device pci 1c.2 off end # PCI Express Port 3
device pci 1c.3 off end # PCI Express Port 4
device pci 1c.4 off end # PCI Express Port 5
device pci 1c.5 on # PCI Express Port 6
register "PcieRpEnable[5]" = "1" register "PcieRpEnable[5]" = "1"
register "PcieRpClkReqSupport[5]" = "1" register "PcieRpClkReqSupport[5]" = "1"
register "PcieRpClkReqNumber[5]" = "4" register "PcieRpClkReqNumber[5]" = "4"
@@ -123,9 +107,7 @@ chip soc/intel/skylake
device generic 0 on end device generic 0 on end
end end
end end
device pci 1c.6 off end # PCI Express Port 7 device ref pcie_rp9 on
device pci 1c.7 off end # PCI Express Port 8
device pci 1d.0 on # PCI Express Port 9(SSD x4)
register "PcieRpEnable[8]" = "1" register "PcieRpEnable[8]" = "1"
register "PcieRpClkReqSupport[8]" = "1" register "PcieRpClkReqSupport[8]" = "1"
register "PcieRpClkReqNumber[8]" = "0" register "PcieRpClkReqNumber[8]" = "0"
@@ -133,16 +115,7 @@ chip soc/intel/skylake
register "PcieRpLtrEnable[8]" = "1" register "PcieRpLtrEnable[8]" = "1"
smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X" smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X"
end end
device pci 1d.1 off end # PCI Express Port 10 device ref uart0 on end
device pci 1d.2 off end # PCI Express Port 11
device pci 1d.3 off end # PCI Express Port 12
device pci 1e.0 on end # UART #0
device pci 1e.1 off end # UART #1
device pci 1e.2 off end # GSPI #0
device pci 1e.3 off end # GSPI #1
device pci 1e.4 off end # eMMC
device pci 1e.5 off end # SDIO
device pci 1e.6 off end # SDCard
device pci 1f.0 on # LPC Interface device pci 1f.0 on # LPC Interface
register "gen1_dec" = "0x000c0681" register "gen1_dec" = "0x000c0681"
register "gen2_dec" = "0x000c1641" register "gen2_dec" = "0x000c1641"
@@ -173,11 +146,8 @@ chip soc/intel/skylake
device pnp 4e.19 off end # Power Management Channel 5 device pnp 4e.19 off end # Power Management Channel 5
end end
end end
device pci 1f.1 off end # P2SB device ref hda on end
device pci 1f.2 on end # Power Management Controller device ref smbus on end
device pci 1f.3 on end # Intel HDA device ref fast_spi on end
device pci 1f.4 on end # SMBus
device pci 1f.5 on end # PCH SPI
device pci 1f.6 off end # GbE
end end
end end