soc/intel/common: Add common reset code

Move reset support into the Intel common branch.  Prevent breaking of
existing platforms by using a Kconfig value to select use of the common
reset code.

BRANCH=none
BUG=None
TEST=Build and run on Glados

Change-Id: I5ba86ef585dde3ef4ecdcc198ab615b5c056d985
Signed-off-by: Stefan Reinauer <reinauer@chromium.org>
Original-Commit-Id: 85d8a6d9628a66cc8d73176d460cd6c5bf6bd6b2
Original-Change-Id: I5048ccf3eb593d59301ad8e808c4e281b9a0aa98
Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/248301
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Commit-Queue: Leroy P Leahy <leroy.p.leahy@intel.com>
Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com>
Reviewed-on: http://review.coreboot.org/9505
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

This commit is contained in:

Lee Leahy

2015-02-09 21:16:14 -08:00

committed by

Patrick Georgi

parent a32b6b9471

commit 14ecb5434b

3 changed files with 60 additions and 0 deletions

4

src/soc/intel/common/Kconfig

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@@ -21,3 +21,7 @@ config MRC_SETTINGS_PROTECT
 endif # CACHE_MRC_SETTINGS
 endif # HAVE_MRC
 config SOC_INTEL_COMMON_RESET
 	bool
 	default n

soc/intel/common: Add common reset code

4 src/soc/intel/common/Kconfig Unescape Escape View File

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src/soc/intel/common/Kconfig

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