diff --git a/src/drivers/thunderbolt/thunderbolt.c b/src/drivers/thunderbolt/thunderbolt.c
index f629469401..9527ce1118 100644
--- a/src/drivers/thunderbolt/thunderbolt.c
+++ b/src/drivers/thunderbolt/thunderbolt.c
@@ -22,47 +22,47 @@
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
 
-static void slot_dev_read_resources(struct device *dev)
-{
-	struct resource *resource;
-
-	resource = new_resource(dev, 0x10);
-	resource->size = 1 << 28;
-	resource->align = 22;
-	resource->gran = 22;
-	resource->limit = 0xffffffff;
-	resource->flags |= IORESOURCE_MEM;
-
-	resource = new_resource(dev, 0x14);
-	resource->size = 1 << 28;
-	resource->align = 22;
-	resource->gran = 22;
-	resource->limit = 0xffffffff;
-	resource->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
-
-	resource = new_resource(dev, 0x18);
-	resource->size = 1 << 13;
-	resource->align = 12;
-	resource->gran = 12;
-	resource->limit = 0xffff;
-	resource->flags |= IORESOURCE_IO;
-}
-
-static struct device_operations slot_dev_ops = {
-	.read_resources   = slot_dev_read_resources,
-};
+// static void slot_dev_read_resources(struct device *dev)
+// {
+// 	struct resource *resource;
+//
+// 	resource = new_resource(dev, 0x10);
+// 	resource->size = 1 << 28;
+// 	resource->align = 22;
+// 	resource->gran = 22;
+// 	resource->limit = 0xffffffff;
+// 	resource->flags |= IORESOURCE_MEM;
+//
+// 	resource = new_resource(dev, 0x14);
+// 	resource->size = 1 << 28;
+// 	resource->align = 22;
+// 	resource->gran = 22;
+// 	resource->limit = 0xffffffff;
+// 	resource->flags |= IORESOURCE_MEM | IORESOURCE_PREFETCH;
+//
+// 	resource = new_resource(dev, 0x18);
+// 	resource->size = 1 << 13;
+// 	resource->align = 12;
+// 	resource->gran = 12;
+// 	resource->limit = 0xffff;
+// 	resource->flags |= IORESOURCE_IO;
+// }
+//
+// static struct device_operations slot_dev_ops = {
+// 	.read_resources   = slot_dev_read_resources,
+// };
 
 static void tbt_pciexp_scan_bridge(struct device *dev) {
-	printk(BIOS_DEBUG, "tbt_pciexp_scan_bridge\n");
+	printk(BIOS_DEBUG, "tbt_pciexp_scan_bridge %s\n", dev_path(dev));
 
 	/* Normal PCIe Scan */
 	pciexp_scan_bridge(dev);
 
 	/* Add dummy slot to preserve resources */
-	struct device *slot;
-	struct device_path slot_path = { .type = DEVICE_PATH_NONE };
-	slot = alloc_dev(dev->link_list, &slot_path);
-	slot->ops = &slot_dev_ops;
+	// struct device *slot;
+	// struct device_path slot_path = { .type = DEVICE_PATH_NONE };
+	// slot = alloc_dev(dev->link_list, &slot_path);
+	// slot->ops = &slot_dev_ops;
 }
 
 static struct pci_operations pcie_ops = {
diff --git a/src/mainboard/system76/cml-u/Kconfig b/src/mainboard/system76/cml-u/Kconfig
index bec06e78ad..4b51708bdc 100644
--- a/src/mainboard/system76/cml-u/Kconfig
+++ b/src/mainboard/system76/cml-u/Kconfig
@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
 #	select MAINBOARD_HAS_SPI_TPM_CR50
 #	select MAINBOARD_HAS_TPM2
 	select NO_UART_ON_SUPERIO
+	select PCIE_DEBUG_INFO
 	select SOC_INTEL_COMETLAKE
 	select SOC_INTEL_COMMON_ACPI_EC_PTS_WAK
 	select SOC_INTEL_COMMON_BLOCK_HDA
diff --git a/src/mainboard/system76/cml-u/devicetree.cb b/src/mainboard/system76/cml-u/devicetree.cb
index c8e79613ed..04b88ff21f 100644
--- a/src/mainboard/system76/cml-u/devicetree.cb
+++ b/src/mainboard/system76/cml-u/devicetree.cb
@@ -209,13 +209,7 @@ chip soc/intel/cannonlake
 		device pci 19.1 off end # I2C #5
 		device pci 19.2 off end # UART #2
 		device pci 1a.0 off end # eMMC
-		device pci 1c.0 on
-			chip drivers/thunderbolt
-				device pci 00.0 on  end # Thunderbolt 3 NHI
-				device pci 01.0 on  end # Thunderbolt 3 PCI bridge
-				device pci 02.0 on  end # Thunderbolt 3 USB controller
-			end
-		end # PCI Express Port 1
+		device pci 1c.0 on  end # PCI Express Port 1
 		device pci 1c.1 off end # PCI Express Port 2
 		device pci 1c.2 off end # PCI Express Port 3
 		device pci 1c.3 off end # PCI Express Port 4