sravan/system76-coreboot
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/xeon_sp: Add C620 p2sb.h

Browse Source 
Add p2sb.h that is shared by all currently supported Xeon SP CPUs.

Change-Id: Idcbff7ad587cb116897a953c079fb0a8b86cc2ed
Signed-off-by: Andrey Petrov <anpetrov@fb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40919
Reviewed-by: Maxim Polyakov <max.senia.poliak@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Andrey Petrov
2020-04-30 13:37:12 -07:00
committed by Andrey Petrov
parent 26679699cd
commit 15070e7ea8
1 changed files with 14 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

14
src/soc/intel/xeon_sp/include/soc/p2sb.h Normal file
View File

@@ -0,0 +1,14 @@
/* SPDX-License-Identifier: GPL-2.0-only */
/* This file is part of the coreboot project. */
#include <commonlib/helpers.h>
/*
* Currently all known xeon-sp CPUs use C620 PCH. These definitions
* come from C620 datasheet (Intel Doc #336067-007US)
*/
#define HPTC_OFFSET 0x60
#define HPTC_ADDR_ENABLE_BIT (1 << 7)
#define PCH_P2SB_EPMASK0 0xb0
#define P2SB_SIZE (16 * MiB)