Add support for Sandybridge based Samsung ChromeBook
Change-Id: I8bf439bc903c1ec105016866753c7cb9ccfe5974 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/952 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
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src/mainboard/samsung/lumpy/ec.h
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src/mainboard/samsung/lumpy/ec.h
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/*
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* This file is part of the coreboot project.
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*
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* Copyright (C) 2011 The Chromium OS Authors. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#ifndef LUMPY_EC_H
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#define LUMPY_EC_H
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#define EC_MAILBOX_PORT 0xa00 /* Mailbox IO address */
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#define EC_SMI_GPI 1 /* GPIO 1 is KBC3_EXTSMI# */
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/* Commands */
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#define EC_SMI_ENABLE 0x74
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#define EC_SMI_DISABLE 0x75
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#define EC_ACPI_ENABLE 0x76 /* Enter ACPI mode */
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#define EC_ACPI_DISABLE 0x77 /* Exit ACPI mode */
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/* Commands with data */
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#define EC_AUX_PORT_MODE 0x64 /* PS/2 control mode */
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#define EC_AUX_PORT_MODE_ENABLE 0x00
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#define EC_AUX_PORT_MODE_DISABLE 0x01
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#define EC_POWER_BUTTON_MODE 0x63
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#define EC_POWER_BUTTON_MODE_OS 0x00 /* OS control, 8 second override */
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#define EC_POWER_BUTTON_MODE_EC 0x01 /* EC control */
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#define EC_BACKLIGHT_OFF 0x67 /* Turn Backlight Off */
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#define EC_BACKLIGHT_ON 0x68 /* Turn Backlight On */
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#define EC_BATTERY_MODE 0x13
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#define EC_BATTERY_MODE_NORMAL 0x00 /* Normal mode */
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#define EC_BATTERY_MODE_EXTEND 0x01 /* Battery Life Cycle Extension */
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#define EC_GET_SMI_CAUSE 0x72 /* Get cause of SMI */
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/* EC RAM */
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#define EC_FAN_SPEED 0xca
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#define EC_FAN_SPEED_LEVEL_0 0x01 /* Level 0 is fastest */
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#define EC_FAN_SPEED_LEVEL_1 0x02 /* Level 1 is fast */
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#define EC_FAN_SPEED_LEVEL_2 0x04 /* Level 2 is slow */
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#define EC_FAN_SPEED_LEVEL_3 0x08 /* Level 3 is slowest */
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#define EC_FAN_SPEED_LEVEL_4 0x10 /* Level 4 is off */
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#define EC_FAN_SPEED_FLAG_OS 0x80 /* OS control of fan speed */
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/* EC SMI */
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#define EC_LID_CLOSE 0x9c /* Lid close event */
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#define EC_LID_OPEN 0x9d /* Lid open event */
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extern void lumpy_ec_init(void);
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#endif // LUMPY_EC_H
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