cpu/intel: Enter romstage without BIST
When entry to romstage is via cpu/intel/car/romstage.c BIST has not been passed down the path for sometime. Change-Id: I345975c53014902269cee21fc393331d33a84dce Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34908 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@@ -37,7 +37,7 @@ void fill_postcar_frame(struct postcar_frame *pcf)
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}
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/* This is the romstage entry called from cpu/intel/car/romstage.c */
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void mainboard_romstage_entry(unsigned long bist)
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void mainboard_romstage_entry(void)
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{
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/* Need to locate the current FSP_INFO_HEADER. The cache-as-ram
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* is still enabled. We can directly access work buffer here. */
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