cpu/intel: Enter romstage without BIST
When entry to romstage is via cpu/intel/car/romstage.c BIST has not been passed down the path for sometime. Change-Id: I345975c53014902269cee21fc393331d33a84dce Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34908 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@@ -23,7 +23,6 @@
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#include <cpu/x86/lapic.h>
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#include <romstage_handoff.h>
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#include <console/console.h>
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#include <cpu/x86/bist.h>
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#include <cpu/intel/romstage.h>
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#include <ec/acpi/ec.h>
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#include <timestamp.h>
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@@ -159,7 +158,7 @@ static inline u16 read_acpi16(u32 addr)
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}
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#endif
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void mainboard_romstage_entry(unsigned long bist)
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void mainboard_romstage_entry(void)
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{
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u32 reg32;
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int s3resume = 0;
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@@ -169,8 +168,7 @@ void mainboard_romstage_entry(unsigned long bist)
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outb(4, 0x61);
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outb(0, 0x61);
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if (bist == 0)
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enable_lapic();
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enable_lapic();
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nehalem_early_initialization(NEHALEM_MOBILE);
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@@ -196,9 +194,6 @@ void mainboard_romstage_entry(unsigned long bist)
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console_init();
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/* Halt if there was a built in self test failure */
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report_bist_failure(bist);
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/* Read PM1_CNT */
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reg32 = inl(DEFAULT_PMBASE + 0x04);
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printk(BIOS_DEBUG, "PM1_CNT: %08x\n", reg32);
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