soc/intel/tigerlake: Add CrashLog implementation for intel TGL

CrashLog is a diagnostic feature for Intel TGL based platforms.
It is meant to capture the state of the platform before a crash.
The state of relevant registers is preserved across a warm reset.

BUG=None
TEST=CrashLog data generated, extracted, processed, decoded sucessfully on delbin.

Signed-off-by: Francois Toguo <francois.toguo.fotso@intel.com>
Change-Id: Ie3763cebcd1178709cc8597710bf062a30901809
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49943
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Francois Toguo
2021-01-26 10:27:49 -08:00
committed by Patrick Georgi
parent 619c60f94c
commit 15cbc3b599
14 changed files with 1194 additions and 4 deletions

View File

@@ -255,4 +255,11 @@ config MRC_CHANNEL_WIDTH
int
default 16
config SOC_INTEL_CRASHLOG
def_bool n
select SOC_INTEL_COMMON_BLOCK_CRASHLOG
select ACPI_BERT
help
Enables CrashLog.
endif