Documentation: Add basic flashing tutorial for Lenovo
* Add basic flashing tutorial ** Describe internal and external flashing ** Describe flash supply diode protection ** Gives general advices on flashing ** Describe how to use flashrom --ifd * Describe basic flashing on Lenovo T4xx devices ** Describe how to disassemble and access the flash IC on T4xx ** Describe flash layout on Sandy Bridge and Ivy Bridge series. Change-Id: Ia833e27f4e7d89ee32be9bed21a0c021839facec Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/27852 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
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@@ -26,6 +26,20 @@ This section contains documentation about coreboot on specific mainboards.
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- [Compaq 8200 Elite SFF](hp/compaq_8200_sff.md)
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## Lenovo
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- [T4xx common](lenovo/t4xx_series.md)
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### Sandy Bridge series
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- [T420](lenovo/t420.md)
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- [T420 / T520 / X220 / T420s / W520 common](lenovo/xx20_series.md)
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### Ivy Bridge series
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- [T430](lenovo/t430.md)
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- [T430 / T530 / X230 / W530 common](lenovo/xx30_series.md)
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## SiFive
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- [SiFive HiFive Unleashed](sifive/hifive-unleashed.md)
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52
Documentation/mainboard/lenovo/flashlayout_xx20.svg
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<tspan x="332.46" y="-134.831">IFD</tspan>
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<tspan x="332.572" y="-59.2299">ME</tspan>
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<tspan x="332.506" y="-14.1361">BIOS</tspan>
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<tspan x="332.572" y="-104.29">GBE</tspan>
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</text>
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</g>
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<text font-size="6.77333" style="fill: #000000;text-anchor:start;font-family:sans-serif;font-style:normal;font-weight:normal" x="265.968" y="-149.208">
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<tspan x="266.362" y="-120.102">0x001000</tspan>
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</text>
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<tspan x="266.162" y="-88.8972">0x003000</tspan>
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<tspan x="266.326" y="1.87412">0x800000</tspan>
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<tspan x="406.127" y="-68.513">Flash #0</tspan>
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</text>
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</svg>
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61
Documentation/mainboard/lenovo/flashlayout_xx30.svg
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Documentation/mainboard/lenovo/flashlayout_xx30.svg
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.0//EN" "http://www.w3.org/TR/2001/PR-SVG-20010719/DTD/svg10.dtd">
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<svg width="10cm" height="11cm" viewBox="265 -156 187 213" xmlns="http://www.w3.org/2000/svg" xmlns:xlink="http://www.w3.org/1999/xlink">
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<tspan x="332.46" y="-134.831">IFD</tspan>
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<tspan x="332.572" y="-59.2299">ME</tspan>
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<tspan x="332.506" y="13.2805">BIOS</tspan>
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<tspan x="332.572" y="-104.29">GBE</tspan>
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</text>
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</g>
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<tspan x="266.362" y="-120.102">0x001000</tspan>
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</text>
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<text font-size="6.77333" style="fill: #000000;text-anchor:start;font-family:sans-serif;font-style:normal;font-weight:normal" x="266.162" y="-88.8972">
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<tspan x="266.162" y="-88.8972">0x003000</tspan>
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</text>
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<text font-size="6.77333" style="fill: #000000;text-anchor:start;font-family:sans-serif;font-style:normal;font-weight:normal" x="266.144" y="-29.6656">
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<tspan x="266.144" y="-29.6656">0x500000</tspan>
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</text>
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<tspan x="266.326" y="1.87412">0x800000</tspan>
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</text>
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<text font-size="10.1598" style="fill: #000000;text-anchor:start;font-family:sans-serif;font-style:normal;font-weight:normal" x="406.127" y="-68.513">
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<tspan x="406.127" y="-68.513">Flash #0</tspan>
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</text>
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<tspan x="407.157" y="30.2529">Flash #1</tspan>
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</text>
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</svg>
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After Width: | Height: | Size: 4.5 KiB |
16
Documentation/mainboard/lenovo/t420.md
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Documentation/mainboard/lenovo/t420.md
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# Lenovo T420
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## Flashing instructions
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You have to disassemble the whole device, as the flash IC is on the bottom
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of the mainboard.
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For more details have a look at [T420 / T520 / X220 / T420s / W520 common] and
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```eval_rst
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:doc:`../../flash_tutorial/ext_power`
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```
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Steps to access the flash IC are described here [T4xx series].
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[T4xx series]: t4xx_series.md
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[T420 / T520 / X220 / T420s / W520 common]: xx20_series.md
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15
Documentation/mainboard/lenovo/t430.md
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15
Documentation/mainboard/lenovo/t430.md
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# Lenovo T430
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## Flashing instructions
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You have to disassemble the whole device, as the flash ICs are on the bottom
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of the mainboard.
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For more details have a look at [T430 / T530 / X230 / T430s / W530 common] and
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```eval_rst
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:doc:`../../flash_tutorial/ext_power`
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```
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Steps to access the flash IC are described here [T4xx series].
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[T4xx series]: t4xx_series.md
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[T430 / T530 / X230 / T430s / W530 common]: xx30_series.md
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Documentation/mainboard/lenovo/t4xx_series.md
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20
Documentation/mainboard/lenovo/t4xx_series.md
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# Lenovo T4xx series disassembly instructions
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A skilled engineer takes around 40 minutes to disassemble, flash and reassemble
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the whole device.
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# Steps to access the flash IC:
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* Unplug the main battery
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* Remove the harddisk, CDROM, ExpressCard, SIM-card, SDcard, SmartCard, ...
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* Open the bottom flap and remove the keyboard screw
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* Remove the keyboard
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* Remove the screen
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* Remove the top enclosure
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* Remove the CMOS battery
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* Remove the speakers
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* Remove WWAN and WIFI card
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* Remove the CPU fan
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* Unplug the power cable
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* Remove the bottom enclosure
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* Flip the mainboard and remove the main frame
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48
Documentation/mainboard/lenovo/xx20_series.md
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48
Documentation/mainboard/lenovo/xx20_series.md
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# Lenovo Sandy Bridge series
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## Flashing coreboot
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```eval_rst
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+---------------------+--------------------+
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| Type | Value |
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+=====================+====================+
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| Socketed flash | no |
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+---------------------+--------------------+
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| Size | 8 MiB |
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+---------------------+--------------------+
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| In circuit flashing | Yes |
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+---------------------+--------------------+
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| Package | SOIC-8 |
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+---------------------+--------------------+
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| Write protection | No |
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+---------------------+--------------------+
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| Dual BIOS feature | No |
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+---------------------+--------------------+
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| Internal flashing | Yes |
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+---------------------+--------------------+
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```
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## Installation instructions
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* Update the EC firmware, as there's no support for EC updates in coreboot.
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* Do **NOT** accidently swap pins or power on the board while a SPI flasher
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is connected. It will destroy your device.
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* It's recommended to only flash the BIOS region. In that case you don't
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need to extract BLOBs from vendor firmware.
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If you want to flash the whole chip, you need BLOBs when building
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coreboot.
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* The shipped *Flash layout* allocates 3MiB to the BIOS region, which is the space
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usable by coreboot.
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* ROM chip size should be set to 8MiB.
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```eval_rst
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Please also have a look at :doc:`../../flash_tutorial/index`.
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```
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## Flash layout
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There's one 8MiB flash which contains IFD, GBE, ME and BIOS regions.
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On Lenovo's UEFI the EC firmware update is placed at the start of the BIOS
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region. The update is then written into the EC once.
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![][fl]
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[fl]: flashlayout_xx20.svg
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76
Documentation/mainboard/lenovo/xx30_series.md
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76
Documentation/mainboard/lenovo/xx30_series.md
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# Lenovo Ivy Bridge series
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## Flashing coreboot
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```eval_rst
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+---------------------+--------------------------------+
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| Type | Value |
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+=====================+================================+
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| Socketed flash | no |
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+---------------------+--------------------------------+
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| Size | 8 MiB + 4MiB |
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+---------------------+--------------------------------+
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| In circuit flashing | Yes |
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+---------------------+--------------------------------+
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| Package | SOIC-8 |
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+---------------------+--------------------------------+
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| Write protection | No |
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+---------------------+--------------------------------+
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| Dual BIOS feature | No |
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+---------------------+--------------------------------+
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| Internal flashing | Yes |
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+---------------------+--------------------------------+
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```
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## Installation instructions
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* Update the EC firmware, as there's no support for EC updates in coreboot.
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* Do **NOT** accidently swap pins or power on the board while a SPI flasher
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is connected. It will permanently brick your device.
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* It's recommended to only flash the BIOS region. In that case you don't
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need to extract BLOBs from vendor firmware.
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If you want to flash the whole chip, you need BLOBs when building
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coreboot.
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* The *Flash layout* shows that by default 7MiB of space are available for
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the use with coreboot.
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* In that case you only want to use a part of the BIOS region that must not
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exceed 4MiB in size, which means CONFIG_CBFS_SIZE must be smaller than 4MiB.
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* ROM chip size should be set to 12MiB.
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```eval_rst
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Please also have a look at :doc:`../../flash_tutorial/index`.
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```
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## Splitting the coreboot.rom
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To split the coreboot.rom into two images (one for the 8MiB and one for the
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4 MiB flash IC), run the following commands:
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```bash
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dd of=top.rom bs=1M if=build/coreboot.rom skip=8
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dd of=bottom.rom bs=1M if=build/coreboot.rom count=8
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```
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That gives one ROM for each flash IC, where *top.rom* is the upper part of the
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flash image, that resides on the 4 MiB flash and *bottom.rom* is the lower part
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of the flash image, that resides on the 8 MiB flash.
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## Dumping a full ROM
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If you flash externally you need to read both flash chips to get two images
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(one for the 8MiB and one for the 4 MiB flash IC), and then run the following
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command to concatenate the files:
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```bash
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cat bottom.rom top.rom > firmware.rom
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```
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## Flash layout
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There's one 8MiB and one 4 MiB flash which contains IFD, GBE, ME and
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BIOS region. These two flash ICs appear as a single 12MiB when flashing
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internally.
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On Lenovo's UEFI the EC firmware update is placed at the start of the BIOS
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region. The update is then written into the EC once.
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![][fl]
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[fl]: flashlayout_xx30.svg
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Reference in New Issue
Block a user