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intel/model_6ex: Prepare for dynamic CONFIG_RAMTOP

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Change-Id: I9bfaa53f8d09962d36df1e86a0edcf100bb08403
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/15229
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Kyösti Mälkki
2016-06-17 10:00:28 +03:00
committed by Martin Roth
parent 4c3de9c3ed
commit 15fa992cc8
18 changed files with 37 additions and 27 deletions
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src/cpu/intel/socket_BGA956/Makefile.inc
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@@ -10,3 +10,4 @@ subdirs-y += ../speedstep
# Use Intel Core (not Core 2) code for CAR init, any CPU might be used.
cpu_incs-y += $(src)/cpu/intel/model_6ex/cache_as_ram.inc
romstage-y += ../car/romstage.c