cpu/*: Add whitespace around '<<'

Change-Id: Id46c0b57bd7c9b954b29537c70254df947690e0b
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/20397
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

src/cpu/intel/car/cache_as_ram_ht.inc

@@ -82,7 +82,7 @@ clear_mtrrs:
 addrsize_no_MSR:
 	movl	$1, %eax
 	cpuid
-	andl	$(1<<6 | 1<<17), %edx	/* PAE or PSE36 */
+	andl	$(1 << 6 | 1 << 17), %edx	/* PAE or PSE36 */
 	jz	addrsize_set_high
 	movl	$0x0f, %edx
 
@@ -208,7 +208,7 @@ ap_init:
 
 	/* MTRR registers are shared between HT siblings. */
 	movl	$(MTRR_PHYS_BASE(0)), %ecx
-	movl	$(1<<12), %eax
+	movl	$(1 << 12), %eax
 	xorl	%edx, %edx
 	wrmsr
 

src/cpu/intel/haswell/smmrelocate.c

@@ -42,8 +42,8 @@
 #define SMBASE_MSR 0xc20
 #define IEDBASE_MSR 0xc22
 
-#define SMRR_SUPPORTED (1<<11)
-#define EMRR_SUPPORTED (1<<12)
+#define SMRR_SUPPORTED (1 << 11)
+#define EMRR_SUPPORTED (1 << 12)
 
 struct smm_relocation_params {
 	u32 smram_base;

src/cpu/intel/smm/gen1/smmrelocate.c

@@ -28,7 +28,7 @@
 #include <console/console.h>
 #include "smi.h"
 
-#define SMRR_SUPPORTED (1<<11)
+#define SMRR_SUPPORTED (1 << 11)
 
 #define  D_OPEN		(1 << 6)
 #define  D_CLS		(1 << 5)