soc/intel/skylake: Use common/block/gpio

Other than switch to use common gpio implementation for skylake based
platform, also apply the needed changes for purism board.

Change-Id: I06e06dbcb6d0d6fe277dfad57b82aca51f94b099
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/19201
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Hannah Williams
2017-04-06 20:54:11 -07:00
committed by Aaron Durbin
parent a05fdcb269
commit 1760cd3eb4
11 changed files with 216 additions and 821 deletions

View File

@ -536,7 +536,9 @@ void pmc_gpe_init(void)
write32(pmc_regs + GPIO_CFG, gpio_cfg_reg);
/* Set the routes in the GPIO communities as well. */
gpio_route_gpe(gpio_cfg_reg >> GPE0_DW0_SHIFT);
gpio_route_gpe((gpio_cfg_reg >> GPE0_DW0_SHIFT) & GPE0_DWX_MASK,
(gpio_cfg_reg >> GPE0_DW1_SHIFT) & GPE0_DWX_MASK,
(gpio_cfg_reg >> GPE0_DW2_SHIFT) & GPE0_DWX_MASK);
/* Set GPE enables based on devictree. */
enable_all_gpe(config->gpe0_en_1, config->gpe0_en_2,