soc/intel/skylake: Use common/block/gpio
Other than switch to use common gpio implementation for skylake based platform, also apply the needed changes for purism board. Change-Id: I06e06dbcb6d0d6fe277dfad57b82aca51f94b099 Signed-off-by: Hannah Williams <hannah.williams@intel.com> Signed-off-by: Lijian Zhao <lijian.zhao@intel.com> Reviewed-on: https://review.coreboot.org/19201 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Youness Alaoui <snifikino@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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Aaron Durbin
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@ -536,7 +536,9 @@ void pmc_gpe_init(void)
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write32(pmc_regs + GPIO_CFG, gpio_cfg_reg);
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/* Set the routes in the GPIO communities as well. */
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gpio_route_gpe(gpio_cfg_reg >> GPE0_DW0_SHIFT);
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gpio_route_gpe((gpio_cfg_reg >> GPE0_DW0_SHIFT) & GPE0_DWX_MASK,
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(gpio_cfg_reg >> GPE0_DW1_SHIFT) & GPE0_DWX_MASK,
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(gpio_cfg_reg >> GPE0_DW2_SHIFT) & GPE0_DWX_MASK);
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/* Set GPE enables based on devictree. */
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enable_all_gpe(config->gpe0_en_1, config->gpe0_en_2,
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