soc/intel/baytrail: Get rid of device_t
Use of device_t has been abandoned in ramstage. Change-Id: I8b2cfe3e2090fb8eed755e40d337c6049d8dd96e Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26456 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
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@ -42,12 +42,13 @@
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#include <cpu/cpu.h>
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static inline void
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add_mmio_resource(device_t dev, int i, unsigned long addr, unsigned long size)
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add_mmio_resource(struct device *dev, int i, unsigned long addr,
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unsigned long size)
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{
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mmio_resource(dev, i, addr >> 10, size >> 10);
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}
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static void sc_add_mmio_resources(device_t dev)
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static void sc_add_mmio_resources(struct device *dev)
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{
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add_mmio_resource(dev, 0xfeb, ABORT_BASE_ADDRESS, ABORT_BASE_SIZE);
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add_mmio_resource(dev, PBASE, PMC_BASE_ADDRESS, PMC_BASE_SIZE);
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@ -82,7 +83,8 @@ static inline int io_range_in_default(int base, int size)
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* Note: this function assumes there is no overlap with the default LPC device's
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* claimed range: LPC_DEFAULT_IO_RANGE_LOWER -> LPC_DEFAULT_IO_RANGE_UPPER.
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*/
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static void sc_add_io_resource(device_t dev, int base, int size, int index)
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static void sc_add_io_resource(struct device *dev, int base, int size,
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int index)
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{
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struct resource *res;
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@ -95,7 +97,7 @@ static void sc_add_io_resource(device_t dev, int base, int size, int index)
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res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
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}
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static void sc_add_io_resources(device_t dev)
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static void sc_add_io_resources(struct device *dev)
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{
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struct resource *res;
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@ -112,7 +114,7 @@ static void sc_add_io_resources(device_t dev)
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sc_add_io_resource(dev, ACPI_BASE_ADDRESS, 128, ABASE);
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}
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static void sc_read_resources(device_t dev)
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static void sc_read_resources(struct device *dev)
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{
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/* Get the normal PCI resources of this device. */
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pci_dev_read_resources(dev);
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@ -137,7 +139,7 @@ static void sc_rtc_init(void)
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* or configuration. This is definitely a hack, but it helps the kernel
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* along.
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*/
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static void com1_configure_resume(device_t dev)
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static void com1_configure_resume(struct device *dev)
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{
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const uint16_t port = 0x3f8;
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@ -165,7 +167,7 @@ static void com1_configure_resume(device_t dev)
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outb(3, port + UART8250_LCR);
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}
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static void sc_init(device_t dev)
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static void sc_init(struct device *dev)
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{
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int i;
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u8 *pr_base = (u8 *)(ILB_BASE_ADDRESS + 0x08);
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@ -207,7 +209,7 @@ static void sc_init(device_t dev)
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*/
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/* Set bit in function disable register to hide this device. */
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static void sc_disable_devfn(device_t dev)
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static void sc_disable_devfn(struct device *dev)
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{
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u32 *func_dis = (u32 *)(PMC_BASE_ADDRESS + FUNC_DIS);
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u32 *func_dis2 = (u32 *)(PMC_BASE_ADDRESS + FUNC_DIS2);
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@ -316,7 +318,7 @@ static void sc_disable_devfn(device_t dev)
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}
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}
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static inline void set_d3hot_bits(device_t dev, int offset)
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static inline void set_d3hot_bits(struct device *dev, int offset)
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{
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uint32_t reg8;
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printk(BIOS_DEBUG, "Power management CAP offset 0x%x.\n", offset);
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@ -328,7 +330,7 @@ static inline void set_d3hot_bits(device_t dev, int offset)
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/* Parts of the audio subsystem are powered by the HDA device. Therefore, one
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* cannot put HDA into D3Hot. Instead perform this workaround to make some of
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* the audio paths work for LPE audio. */
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static void hda_work_around(device_t dev)
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static void hda_work_around(struct device *dev)
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{
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u32 *gctl = (u32 *)(TEMP_BASE_ADDRESS + 0x8);
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@ -345,7 +347,7 @@ static void hda_work_around(device_t dev)
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pci_write_config32(dev, PCI_BASE_ADDRESS_0, 0);
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}
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static int place_device_in_d3hot(device_t dev)
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static int place_device_in_d3hot(struct device *dev)
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{
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unsigned offset;
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@ -461,7 +463,7 @@ static int place_device_in_d3hot(device_t dev)
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}
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/* Common PCI device function disable. */
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void southcluster_enable_dev(device_t dev)
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void southcluster_enable_dev(struct device *dev)
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{
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uint32_t reg32;
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@ -494,7 +496,7 @@ void southcluster_enable_dev(device_t dev)
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}
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}
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static void southcluster_inject_dsdt(device_t device)
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static void southcluster_inject_dsdt(struct device *device)
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{
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global_nvs_t *gnvs;
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