Add initial framework for the Tyan S1846.
It's not fully working, among other things because the Intel 440BX northbridge isn't working, yet. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2580 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann
135
src/mainboard/tyan/s1846/Config.lb
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135
src/mainboard/tyan/s1846/Config.lb
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@@ -0,0 +1,135 @@
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##
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## Compute the location and size of where this firmware image
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## (linuxBIOS plus bootloader) will live in the boot rom chip.
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##
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if USE_FALLBACK_IMAGE
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default ROM_SECTION_SIZE = FALLBACK_SIZE
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default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
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else
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default ROM_SECTION_SIZE = ( ROM_SIZE - FALLBACK_SIZE )
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default ROM_SECTION_OFFSET = 0
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end
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##
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## Compute the start location and size size of
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## The linuxBIOS bootloader.
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##
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default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
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default PAYLOAD_SIZE = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
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##
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## Compute where this copy of linuxBIOS will start in the boot rom
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##
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default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
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##
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## Compute a range of ROM that can cached to speed up linuxBIOS,
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## execution speed.
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##
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## XIP_ROM_SIZE must be a power of 2.
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## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
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##
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default XIP_ROM_SIZE=65536
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default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
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##
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## Set all of the defaults for an x86 architecture
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##
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arch i386 end
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##
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## Build the objects we have code for in this directory.
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##
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driver mainboard.o
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#if HAVE_PIRQ_TABLE object irq_tables.o end
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#object reset.o
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##
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## Romcc output
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##
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makerule ./failover.E
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depends "$(MAINBOARD)/failover.c ./romcc"
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action "./romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
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end
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makerule ./failover.inc
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depends "$(MAINBOARD)/failover.c ./romcc"
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action "./romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/failover.c -o $@"
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end
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makerule ./auto.E
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depends "$(MAINBOARD)/auto.c ./romcc"
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action "./romcc -E -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
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end
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makerule ./auto.inc
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depends "$(MAINBOARD)/auto.c ./romcc"
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action "./romcc -mcpu=i386 -O -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/auto.c -o $@"
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end
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##
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## Build our 16 bit and 32 bit linuxBIOS entry code
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##
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mainboardinit cpu/x86/16bit/entry16.inc
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mainboardinit cpu/x86/32bit/entry32.inc
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ldscript /cpu/x86/16bit/entry16.lds
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ldscript /cpu/x86/32bit/entry32.lds
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##
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## Build our reset vector (This is where linuxBIOS is entered)
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##
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if USE_FALLBACK_IMAGE
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mainboardinit cpu/x86/16bit/reset16.inc
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ldscript /cpu/x86/16bit/reset16.lds
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else
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mainboardinit cpu/x86/32bit/reset32.inc
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ldscript /cpu/x86/32bit/reset32.lds
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end
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### Should this be in the northbridge code?
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mainboardinit arch/i386/lib/cpu_reset.inc
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##
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## Include an id string (For safe flashing)
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##
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mainboardinit arch/i386/lib/id.inc
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ldscript /arch/i386/lib/id.lds
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###
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### This is the early phase of linuxBIOS startup
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### Things are delicate and we test to see if we should
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### failover to another image.
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###
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if USE_FALLBACK_IMAGE
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ldscript /arch/i386/lib/failover.lds
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mainboardinit ./failover.inc
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end
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###
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### O.k. We aren't just an intermediary anymore!
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###
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##
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## Setup RAM
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##
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mainboardinit cpu/x86/fpu/enable_fpu.inc
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mainboardinit cpu/x86/mmx/enable_mmx.inc
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mainboardinit ./auto.inc
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mainboardinit cpu/x86/mmx/disable_mmx.inc
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##
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## Include the secondary Configuration files
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##
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dir /pc80
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config chip.h
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# TODO.
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chip northbridge/intel/i440bx
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device pci_domain 0 on
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end
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chip cpu/intel/slot_2
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end
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end
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150
src/mainboard/tyan/s1846/Options.lb
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150
src/mainboard/tyan/s1846/Options.lb
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@@ -0,0 +1,150 @@
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uses HAVE_PIRQ_TABLE
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uses USE_FALLBACK_IMAGE
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uses HAVE_FALLBACK_BOOT
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uses HAVE_HARD_RESET
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uses HAVE_OPTION_TABLE
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uses USE_OPTION_TABLE
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uses CONFIG_ROM_PAYLOAD
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uses IRQ_SLOT_COUNT
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uses MAINBOARD
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uses MAINBOARD_VENDOR
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uses MAINBOARD_PART_NUMBER
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uses LINUXBIOS_EXTRA_VERSION
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uses ARCH
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uses FALLBACK_SIZE
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uses STACK_SIZE
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uses HEAP_SIZE
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uses ROM_SIZE
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uses ROM_SECTION_SIZE
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uses ROM_IMAGE_SIZE
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uses ROM_SECTION_SIZE
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uses ROM_SECTION_OFFSET
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uses CONFIG_ROM_PAYLOAD_START
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uses CONFIG_COMPRESSED_PAYLOAD_LZMA
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uses PAYLOAD_SIZE
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uses _ROMBASE
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uses _RAMBASE
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uses XIP_ROM_SIZE
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uses XIP_ROM_BASE
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uses CROSS_COMPILE
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uses CC
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uses HOSTCC
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uses OBJCOPY
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uses DEFAULT_CONSOLE_LOGLEVEL
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uses MAXIMUM_CONSOLE_LOGLEVEL
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uses CONFIG_CONSOLE_SERIAL8250
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uses TTYS0_BAUD
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uses TTYS0_BASE
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uses TTYS0_LCS
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uses CONFIG_UDELAY_TSC
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## ROM_SIZE is the size of boot ROM that this board will use.
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default ROM_SIZE = 256*1024
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###
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### Build options
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###
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##
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## Build code for the fallback boot
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##
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default HAVE_FALLBACK_BOOT=1
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##
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## Build code to reset the motherboard from linuxBIOS
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##
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default HAVE_HARD_RESET=0
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##
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## Build code to export a programmable irq routing table
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##
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default HAVE_PIRQ_TABLE=0
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default IRQ_SLOT_COUNT=4
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#object irq_tables.o
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##
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## Build code to export a CMOS option table
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##
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default HAVE_OPTION_TABLE=0
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###
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### LinuxBIOS layout values
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###
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## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
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default ROM_IMAGE_SIZE = 64 * 1024
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default FALLBACK_SIZE = 128 * 1024
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##
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## Use a small 8K stack
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##
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default STACK_SIZE=0x2000
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##
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## Use a small 16K heap
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##
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default HEAP_SIZE=0x4000
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##
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## Only use the option table in a normal image
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##
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#default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
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default USE_OPTION_TABLE = 0
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default _RAMBASE = 0x00004000
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default CONFIG_ROM_PAYLOAD = 1
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##
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## The default compiler
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##
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default CROSS_COMPILE=""
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default CC="$(CROSS_COMPILE)gcc -m32"
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default HOSTCC="gcc"
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##
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## The Serial Console
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##
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# To Enable the Serial Console
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default CONFIG_CONSOLE_SERIAL8250=1
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## Select the serial console baud rate
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default TTYS0_BAUD=115200
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#default TTYS0_BAUD=57600
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#default TTYS0_BAUD=38400
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#default TTYS0_BAUD=19200
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#default TTYS0_BAUD=9600
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|
#default TTYS0_BAUD=4800
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#default TTYS0_BAUD=2400
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#default TTYS0_BAUD=1200
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|
|
||||||
|
# Select the serial console base port
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default TTYS0_BASE=0x3f8
|
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|
|
||||||
|
# Select the serial protocol
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||||||
|
# This defaults to 8 data bits, 1 stop bit, and no parity
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|
default TTYS0_LCS=0x3
|
||||||
|
|
||||||
|
##
|
||||||
|
### Select the linuxBIOS loglevel
|
||||||
|
##
|
||||||
|
## EMERG 1 system is unusable
|
||||||
|
## ALERT 2 action must be taken immediately
|
||||||
|
## CRIT 3 critical conditions
|
||||||
|
## ERR 4 error conditions
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||||||
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## WARNING 5 warning conditions
|
||||||
|
## NOTICE 6 normal but significant condition
|
||||||
|
## INFO 7 informational
|
||||||
|
## DEBUG 8 debug-level messages
|
||||||
|
## SPEW 9 Way too many details
|
||||||
|
|
||||||
|
## Request this level of debugging output
|
||||||
|
default DEFAULT_CONSOLE_LOGLEVEL=9
|
||||||
|
## At a maximum only compile in this level of debugging
|
||||||
|
default MAXIMUM_CONSOLE_LOGLEVEL=9
|
||||||
|
|
||||||
|
default CONFIG_UDELAY_TSC=1
|
||||||
|
|
||||||
|
end
|
||||||
|
|
||||||
86
src/mainboard/tyan/s1846/auto.c
Normal file
86
src/mainboard/tyan/s1846/auto.c
Normal file
@@ -0,0 +1,86 @@
|
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|
/*
|
||||||
|
* This file is part of the LinuxBIOS project.
|
||||||
|
*
|
||||||
|
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||||
|
*/
|
||||||
|
|
||||||
|
#define ASSEMBLY 1
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <device/pci_def.h>
|
||||||
|
#include <arch/io.h>
|
||||||
|
#include <device/pnp_def.h>
|
||||||
|
#include <arch/romcc_io.h>
|
||||||
|
#include <arch/hlt.h>
|
||||||
|
#include "pc80/serial.c"
|
||||||
|
#include "arch/i386/lib/console.c"
|
||||||
|
#include "ram/ramtest.c"
|
||||||
|
#include "southbridge/intel/i82371eb/i82371eb_early_smbus.c"
|
||||||
|
#include "northbridge/intel/i440bx/raminit.h"
|
||||||
|
#include "mainboard/bitworks/ims/debug.c" // FIXME
|
||||||
|
#include "pc80/udelay_io.c"
|
||||||
|
#include "lib/delay.c"
|
||||||
|
#include "superio/nsc/pc87309/pc87309_early_serial.c"
|
||||||
|
#include "cpu/x86/mtrr/earlymtrr.c"
|
||||||
|
#include "cpu/x86/bist.h"
|
||||||
|
|
||||||
|
#define SERIAL_DEV PNP_DEV(0x2e, PC87309_SP1)
|
||||||
|
|
||||||
|
static inline int spd_read_byte(unsigned int device, unsigned int address)
|
||||||
|
{
|
||||||
|
return smbus_read_byte(device, address);
|
||||||
|
}
|
||||||
|
|
||||||
|
#include "northbridge/intel/i440bx/raminit.c"
|
||||||
|
#include "northbridge/intel/i440bx/debug.c"
|
||||||
|
#include "sdram/generic_sdram.c"
|
||||||
|
|
||||||
|
static void main(unsigned long bist)
|
||||||
|
{
|
||||||
|
static const struct mem_controller memctrl[] = {
|
||||||
|
{
|
||||||
|
.d0 = PCI_DEV(0, 0, 0),
|
||||||
|
.channel0 = {
|
||||||
|
(0xa << 3) | 0,
|
||||||
|
(0xa << 3) | 1,
|
||||||
|
(0xa << 3) | 2,
|
||||||
|
(0xa << 3) | 3,
|
||||||
|
},
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
/* Skip this if there was a built in self test failure. */
|
||||||
|
if (bist == 0) {
|
||||||
|
early_mtrr_init();
|
||||||
|
}
|
||||||
|
|
||||||
|
pc87309_enable_serial(SERIAL_DEV, TTYS0_BASE);
|
||||||
|
uart_init();
|
||||||
|
console_init();
|
||||||
|
|
||||||
|
/* Halt if there was a built in self test failure. */
|
||||||
|
report_bist_failure(bist);
|
||||||
|
|
||||||
|
enable_smbus();
|
||||||
|
|
||||||
|
dump_spd_registers(&memctrl[0]);
|
||||||
|
|
||||||
|
sdram_initialize(sizeof(memctrl) / sizeof(memctrl[0]), memctrl);
|
||||||
|
|
||||||
|
/* Check 64 MB of RAM. */
|
||||||
|
ram_check(0x00000000, 0x04000000);
|
||||||
|
}
|
||||||
24
src/mainboard/tyan/s1846/chip.h
Normal file
24
src/mainboard/tyan/s1846/chip.h
Normal file
@@ -0,0 +1,24 @@
|
|||||||
|
/*
|
||||||
|
* This file is part of the LinuxBIOS project.
|
||||||
|
*
|
||||||
|
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||||
|
*/
|
||||||
|
|
||||||
|
extern struct chip_operations mainboard_tyan_s1846_ops;
|
||||||
|
|
||||||
|
struct mainboard_tyan_s1846_config {
|
||||||
|
};
|
||||||
32
src/mainboard/tyan/s1846/failover.c
Normal file
32
src/mainboard/tyan/s1846/failover.c
Normal file
@@ -0,0 +1,32 @@
|
|||||||
|
#define ASSEMBLY 1
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <device/pci_def.h>
|
||||||
|
#include <device/pci_ids.h>
|
||||||
|
#include <arch/io.h>
|
||||||
|
#include "arch/romcc_io.h"
|
||||||
|
#include "pc80/mc146818rtc_early.c"
|
||||||
|
|
||||||
|
static unsigned long main(unsigned long bist)
|
||||||
|
{
|
||||||
|
/* This is the primary cpu how should I boot? */
|
||||||
|
if (do_normal_boot()) {
|
||||||
|
goto normal_image;
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
goto fallback_image;
|
||||||
|
}
|
||||||
|
normal_image:
|
||||||
|
asm volatile ("jmp __normal_image"
|
||||||
|
: /* outputs */
|
||||||
|
: "a" (bist) /* inputs */
|
||||||
|
: /* clobbers */
|
||||||
|
);
|
||||||
|
cpu_reset:
|
||||||
|
asm volatile ("jmp __cpu_reset"
|
||||||
|
: /* outputs */
|
||||||
|
: "a"(bist) /* inputs */
|
||||||
|
: /* clobbers */
|
||||||
|
);
|
||||||
|
fallback_image:
|
||||||
|
return bist;
|
||||||
|
}
|
||||||
26
src/mainboard/tyan/s1846/mainboard.c
Normal file
26
src/mainboard/tyan/s1846/mainboard.c
Normal file
@@ -0,0 +1,26 @@
|
|||||||
|
/*
|
||||||
|
* This file is part of the LinuxBIOS project.
|
||||||
|
*
|
||||||
|
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
|
||||||
|
*
|
||||||
|
* This program is free software; you can redistribute it and/or modify
|
||||||
|
* it under the terms of the GNU General Public License as published by
|
||||||
|
* the Free Software Foundation; either version 2 of the License, or
|
||||||
|
* (at your option) any later version.
|
||||||
|
*
|
||||||
|
* This program is distributed in the hope that it will be useful,
|
||||||
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
* GNU General Public License for more details.
|
||||||
|
*
|
||||||
|
* You should have received a copy of the GNU General Public License
|
||||||
|
* along with this program; if not, write to the Free Software
|
||||||
|
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <device/device.h>
|
||||||
|
#include "chip.h"
|
||||||
|
|
||||||
|
struct chip_operations mainboard_tyan_s1846_ops = {
|
||||||
|
CHIP_NAME("Tyan S1846 Mainboard")
|
||||||
|
};
|
||||||
38
targets/tyan/s1846/Config.lb
Normal file
38
targets/tyan/s1846/Config.lb
Normal file
@@ -0,0 +1,38 @@
|
|||||||
|
##
|
||||||
|
## This file is part of the LinuxBIOS project.
|
||||||
|
##
|
||||||
|
## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
|
||||||
|
##
|
||||||
|
## This program is free software; you can redistribute it and/or modify
|
||||||
|
## it under the terms of the GNU General Public License as published by
|
||||||
|
## the Free Software Foundation; either version 2 of the License, or
|
||||||
|
## (at your option) any later version.
|
||||||
|
##
|
||||||
|
## This program is distributed in the hope that it will be useful,
|
||||||
|
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||||
|
## GNU General Public License for more details.
|
||||||
|
##
|
||||||
|
## You should have received a copy of the GNU General Public License
|
||||||
|
## along with this program; if not, write to the Free Software
|
||||||
|
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||||
|
##
|
||||||
|
|
||||||
|
target s1846
|
||||||
|
mainboard tyan/s1846
|
||||||
|
|
||||||
|
option ROM_SIZE = 256 * 1024
|
||||||
|
|
||||||
|
romimage "normal"
|
||||||
|
option USE_FALLBACK_IMAGE = 0
|
||||||
|
option LINUXBIOS_EXTRA_VERSION = ".0Normal"
|
||||||
|
payload /etc/hosts # TODO
|
||||||
|
end
|
||||||
|
|
||||||
|
romimage "fallback"
|
||||||
|
option USE_FALLBACK_IMAGE = 1
|
||||||
|
option LINUXBIOS_EXTRA_VERSION = ".0Fallback"
|
||||||
|
payload /etc/hosts # TODO
|
||||||
|
end
|
||||||
|
|
||||||
|
buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"
|
||||||
Reference in New Issue
Block a user