AMD binaryPI: Switch to MMCONF_SUPPORT_DEFAULT
Vendorcode always does PCI MMCONF access once it is enabled via MSR. In coreboot proper, we don't give opportunity to make pci_read/write calls before PCI MMCONF is enabled via MSR. This happens early in romstage amd_initmmio() for all cores. Change-Id: Id6ec25706b52441259e7dc1582f9a4ce8b154083 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17534 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@@ -14,7 +14,6 @@
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##
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config NORTHBRIDGE_AMD_PI_00630F01
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bool
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select MMCONF_SUPPORT
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if NORTHBRIDGE_AMD_PI_00630F01
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@@ -14,7 +14,6 @@
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##
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config NORTHBRIDGE_AMD_PI_00660F01
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bool
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select MMCONF_SUPPORT
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if NORTHBRIDGE_AMD_PI_00660F01
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@@ -14,7 +14,6 @@
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##
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config NORTHBRIDGE_AMD_PI_00670F00
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bool
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select MMCONF_SUPPORT
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if NORTHBRIDGE_AMD_PI_00670F00
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@@ -15,7 +15,6 @@
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##
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config NORTHBRIDGE_AMD_PI_00730F01
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bool
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select MMCONF_SUPPORT
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if NORTHBRIDGE_AMD_PI_00730F01
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