device/pciexp: Add support for PCIe CLK power management

Set PCIe "Enable Clock Power Management", if endpoint supports it.

BUG=chrome-os-partner:31424
BRANCH=none
TEST=build and boot on rambi, check Enable Clock Power Management
     in link control register is set properly

Change-Id: Ie54110d1ef42184cfcf47c9fe4d735960aebe47f
Signed-off-by: Kane Chen <kane.chen@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/220742
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
[Edit commit message.]
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/8447
Tested-by: build bot (Jenkins)
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Kane Chen
2014-10-01 11:13:54 +08:00
committed by Stefan Reinauer
parent 2c4aab3fd6
commit 18cb1340f1
3 changed files with 32 additions and 0 deletions

View File

@@ -251,6 +251,14 @@ config PCIEXP_ASPM
help
Detect and enable ASPM on PCIe links.
config PCIEXP_CLK_PM
prompt "Enable PCIe Clock Power Management"
bool
depends on PCIEXP_PLUGIN_SUPPORT
default n
help
Detect and enable Clock Power Management on PCIe.
config PCI_BUS_SEGN_BITS
int
default 0