mainboard/intel/cannonlake: Add ec entry into flashmap

Add EC entries into chromeos.fmd file.

BRANCH=None
BUG=None
TEST=Flash image and confirm system can get out of reset successfully.
System will not be able to reach reset vector if flash map described in 
coreboot does not match intel flash map generated from fit.

Change-Id: Ic18ce59941b4ff8171fe661d332e3e521d988341
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/21526
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Lijian Zhao
2017-09-12 23:24:44 -07:00
committed by Aaron Durbin
parent 77343fd668
commit 18f8f622d5

View File

@@ -1,9 +1,10 @@
FLASH@0xff000000 0x1000000 { FLASH@0xff000000 0x1000000 {
SI_ALL@0x0 0x300000 { SI_ALL@0x0 0x380000 {
SI_DESC@0x0 0x1000 SI_DESC@0x0 0x1000
SI_ME@0x1000 0x2ff000 SI_EC@0x01000 0x80000
SI_ME@0x81000 0x2ff000
} }
SI_BIOS@0x300000 0xd00000 { SI_BIOS@0x380000 0xc80000 {
RW_SECTION_A@0x0 0x368000 { RW_SECTION_A@0x0 0x368000 {
VBLOCK_A@0x0 0x10000 VBLOCK_A@0x0 0x10000
FW_MAIN_A(CBFS)@0x10000 0x357fc0 FW_MAIN_A(CBFS)@0x10000 0x357fc0
@@ -28,15 +29,15 @@ FLASH@0xff000000 0x1000000 {
RW_NVRAM@0x2a000 0x6000 RW_NVRAM@0x2a000 0x6000
} }
RW_LEGACY(CBFS)@0x700000 0x200000 RW_LEGACY(CBFS)@0x700000 0x200000
WP_RO@0x900000 0x400000 { WP_RO@0x900000 0x380000 {
RO_VPD@0x0 0x4000 RO_VPD@0x0 0x4000
RO_UNUSED@0x4000 0xc000 RO_UNUSED@0x4000 0xc000
RO_SECTION@0x10000 0x3f0000 { RO_SECTION@0x10000 0x370000 {
FMAP@0x0 0x800 FMAP@0x0 0x800
RO_FRID@0x800 0x40 RO_FRID@0x800 0x40
RO_FRID_PAD@0x840 0x7c0 RO_FRID_PAD@0x840 0x7c0
GBB@0x1000 0xef000 GBB@0x1000 0xef000
COREBOOT(CBFS)@0xf0000 0x300000 COREBOOT(CBFS)@0xf0000 0x280000
} }
} }
} }