haswell: add option to change DqPinsInterleaved
Some mainboards will need to have this set. Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: I4732a9af822a60b5050d03d2ac4bb7cbd6c723d0 Reviewed-on: https://gerrit.chromium.org/gerrit/65722 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: Stefan Reinauer <reinauer@google.com> Commit-Queue: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/4474 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
This commit is contained in:
committed by
Patrick Georgi
parent
8818b9d0d4
commit
190688c65f
@@ -31,7 +31,7 @@
|
|||||||
#define PEI_DATA_H
|
#define PEI_DATA_H
|
||||||
|
|
||||||
typedef void (*tx_byte_func)(unsigned char byte);
|
typedef void (*tx_byte_func)(unsigned char byte);
|
||||||
#define PEI_VERSION 14
|
#define PEI_VERSION 15
|
||||||
|
|
||||||
#define MAX_USB2_PORTS 16
|
#define MAX_USB2_PORTS 16
|
||||||
#define MAX_USB3_PORTS 16
|
#define MAX_USB3_PORTS 16
|
||||||
@@ -92,6 +92,7 @@ struct pei_data
|
|||||||
int dimm_channel1_disabled;
|
int dimm_channel1_disabled;
|
||||||
/* Enable 2x Refresh Mode */
|
/* Enable 2x Refresh Mode */
|
||||||
int ddr_refresh_2x;
|
int ddr_refresh_2x;
|
||||||
|
int dq_pins_interleaved;
|
||||||
/* Data read from flash and passed into MRC */
|
/* Data read from flash and passed into MRC */
|
||||||
unsigned char *mrc_input;
|
unsigned char *mrc_input;
|
||||||
unsigned int mrc_input_len;
|
unsigned int mrc_input_len;
|
||||||
|
Reference in New Issue
Block a user