adapt to 1.1.6
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1445 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer
parent
0eed64bf66
commit
1943d501b4
@ -1,28 +1,34 @@
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uses HAVE_MP_TABLE
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uses HAVE_PIRQ_TABLE
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uses USE_FALLBACK_IMAGE
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uses USE_OPTION_TABLE
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uses HAVE_FALLBACK_BOOT
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uses HAVE_HARD_RESET
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uses IRQ_SLOT_COUNT
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uses HAVE_OPTION_TABLE
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uses CONFIG_MAX_CPUS
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uses CONFIG_IOAPIC
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uses CONFIG_SMP
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uses FALLBACK_SIZE
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uses ROM_SIZE
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uses ROM_SECTION_SIZE
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uses ROM_IMAGE_SIZE
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uses ROM_SECTION_SIZE
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uses ROM_SECTION_OFFSET
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uses CONFIG_SMP
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uses CONFIG_MAX_CPUS
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uses CONFIG_IOAPIC
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uses CONFIG_ROM_STREAM
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uses CONFIG_ROM_STREAM_START
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uses PAYLOAD_SIZE
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uses _ROMBASE
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uses XIP_ROM_SIZE
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uses XIP_ROM_BASE
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uses IRQ_SLOT_COUNT
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uses STACK_SIZE
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uses HEAP_SIZE
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uses USE_OPTION_TABLE
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uses LB_CKS_RANGE_START
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uses LB_CKS_RANGE_END
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uses LB_CKS_LOC
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uses MAINBOARD_PART_NUMBER
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uses MAINBOARD_VENDOR
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## ROM_SIZE is the size of boot ROM that this board will use.
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default ROM_SIZE=524288
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@ -45,7 +51,7 @@ default HAVE_HARD_RESET=1
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## Build code to export a programmable irq routing table
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##
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default HAVE_PIRQ_TABLE=1
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default IRQ_SLOT_COUNT=7
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default IRQ_SLOT_COUNT=9
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##
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## Build code to export an x86 MP table
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@ -58,6 +64,13 @@ default HAVE_MP_TABLE=1
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##
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default HAVE_OPTION_TABLE=1
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##
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## Move the default LinuxBIOS cmos range off of AMD RTC registers
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##
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default LB_CKS_RANGE_START=49
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default LB_CKS_RANGE_END=122
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default LB_CKS_LOC=123
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##
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## Build code for SMP support
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## Only worry about 2 micro processors
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@ -70,6 +83,12 @@ default CONFIG_MAX_CPUS=2
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##
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default CONFIG_IOAPIC=1
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##
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## Clean up the motherboard id strings
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##
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default MAINBOARD_PART_NUMBER="Khepri 2100"
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default MAINBOARD_VENDOR="Newisys"
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###
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### LinuxBIOS layout values
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###
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@ -154,12 +173,12 @@ end
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makerule ./failover.inc
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depends "./failover.E ./romcc"
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action "./romcc -O2 -o failover.inc --label-prefix=failover ./failover.E"
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action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E"
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end
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makerule ./auto.E
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depends "$(MAINBOARD)/auto.c"
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action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E"
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depends "$(MAINBOARD)/auto.c option_table.h"
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action "$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E"
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end
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makerule ./auto.inc
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depends "./auto.E ./romcc"
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@ -171,6 +190,7 @@ end
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##
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mainboardinit cpu/i386/entry16.inc
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mainboardinit cpu/i386/entry32.inc
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mainboardinit cpu/i386/bist32.inc
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ldscript /cpu/i386/entry16.lds
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ldscript /cpu/i386/entry32.lds
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@ -300,4 +320,5 @@ end
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##
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mainboardinit pc80/serial.inc
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mainboardinit arch/i386/lib/console.inc
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mainboardinit cpu/i386/bist32_fail.inc
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@ -4,9 +4,8 @@
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#include <stdint.h>
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#include <device/pci_def.h>
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#include <cpu/p6/apic.h>
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#include <arch/io.h>
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#include <device/pnp.h>
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#include <device/pnp_def.h>
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#include <arch/romcc_io.h>
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#include <arch/smp/lapic.h>
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#include "option_table.h"
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@ -98,13 +97,13 @@ static unsigned int generate_row(uint8_t node, uint8_t row, uint8_t maxnodes)
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{ 0x00010404, 0x00050101 }
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};
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if(maxnodes>2) {
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if(maxnodes > 2) {
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print_debug("this mainboard is only designed for 2 cpus\r\n");
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maxnodes=2;
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}
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if (!(node>=maxnodes || row>=maxnodes)) {
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if (!(node >= maxnodes || row >= maxnodes)) {
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ret=rows_2p[node][row];
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}
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@ -176,7 +175,6 @@ static void main(void)
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print_info("ht reset -");
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soft_reset();
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}
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#if 0
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print_pci_devices();
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#endif
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@ -194,7 +192,6 @@ static void main(void)
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dump_pci_device(PCI_DEV(0, 0x18, 2));
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#endif
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/* Check all of memory */
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#if 0
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/* Check the first 1M */
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ram_check(0x00000000, 0x000100000);
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@ -29,6 +29,9 @@ entries
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386 1 e 1 ECC_memory
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388 4 r 0 reboot_bits
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392 3 e 5 baud_rate
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395 1 e 1 hw_scrubber
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396 1 e 1 interleave_chip_selects
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397 2 e 8 max_mem_clock
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400 1 e 1 power_on_after_fail
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412 4 e 6 debug_level
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416 4 e 7 boot_first
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@ -36,7 +39,14 @@ entries
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424 4 e 7 boot_third
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428 4 h 0 boot_index
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432 8 h 0 boot_countdown
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1008 16 h 0 check_sum
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440 4 e 9 slow_cpu
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444 1 e 1 nmi
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728 256 h 0 user_data
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984 16 h 0 check_sum
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# Reserve the extended AMD configuration registers
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1000 24 r 0 reserved_memory
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enumerations
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@ -66,9 +76,21 @@ enumerations
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7 9 Fallback_HDD
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7 10 Fallback_Floppy
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#7 3 ROM
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8 0 200Mhz
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8 1 166Mhz
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8 2 133Mhz
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8 3 100Mhz
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9 0 off
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9 1 87.5%
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9 2 75.0%
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9 3 62.5%
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9 4 50.0%
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9 5 37.5%
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9 6 25.0%
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9 7 12.5%
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checksums
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checksum 392 1007 1008
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checksum 392 983 984
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@ -14,7 +14,7 @@ static void main(void)
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{
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/* Nothing special needs to be done to find bus 0 */
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/* Allow the HT devices to be found */
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enumerate_ht_chain(0);
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enumerate_ht_chain();
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/* Setup the 8111 */
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amd8111_enable_rom();
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