AMD PISTACHIO mainboard support.

The following ACPI features are supported:
 1. S1, S4, S5 sleep and wake up (by power button).
 2. Thermal configuration based on ADT7475.
 3. HPET timer.
 4. Interrupt routing based on ACPI table.

Signed-off-by: Maggie Li <maggie.li@amd.com>
Reviewed-by: Michael Xie <michael.xie@amd.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3808 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

targets/amd/pistachio/Config-abuild.lb

@@ -0,0 +1,29 @@
+# This will make a target directory of ./VENDOR_MAINBOARD
+
+target VENDOR_MAINBOARD
+mainboard VENDOR/MAINBOARD
+
+option CC="CROSSCC"
+option CROSS_COMPILE="CROSS_PREFIX"
+option HOSTCC="CROSS_HOSTCC"
+
+__COMPRESSION__
+
+option ROM_SIZE=1024*1024
+romimage "normal"
+	option USE_FALLBACK_IMAGE=0
+	option ROM_IMAGE_SIZE=0x20000
+	option XIP_ROM_SIZE=0x20000
+        option COREBOOT_EXTRA_VERSION=".0-normal"
+	payload __PAYLOAD__
+end
+
+romimage "failover"
+        option USE_FALLBACK_IMAGE=1
+        option ROM_IMAGE_SIZE=0x20000
+	option XIP_ROM_SIZE=0x20000
+	option COREBOOT_EXTRA_VERSION=".0-failover"
+	payload __PAYLOAD__
+end
+
+buildrom ./coreboot.rom ROM_SIZE "normal" "failover"

targets/amd/pistachio/Config.lb

@@ -0,0 +1,21 @@
+# This will make a target directory of ./pistachio
+
+target pistachio
+mainboard amd/pistachio
+
+romimage "normal"
+	option ROM_SIZE = 1024*1024 - 55808
+	option USE_FALLBACK_IMAGE=0
+	option ROM_IMAGE_SIZE=0x20000
+	option XIP_ROM_SIZE=0x20000
+	payload ../payload.elf
+end
+
+romimage "fallback" 
+	option USE_FALLBACK_IMAGE=1
+	option ROM_IMAGE_SIZE=0x20000
+	option XIP_ROM_SIZE=0x20000
+	payload ../payload.elf
+end
+
+buildrom ./coreboot.rom ROM_SIZE "normal" "fallback"