soc/amd/picasso: move bert_reserved_region to common/block/cpu/noncar

The same functionality will eventually be needed on Cezanne.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ib49124c2c774ad3352ea2f7d8d827388029be041
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50401
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>

src/soc/amd/picasso/Makefile.inc

@@ -23,7 +23,6 @@ romstage-y += i2c.c
 romstage-y += romstage.c
 romstage-y += gpio.c
 romstage-y += reset.c
-romstage-y += memmap.c
 romstage-y += uart.c
 romstage-y += mrc_cache.c
 
@@ -45,7 +44,6 @@ ramstage-y += fch.c
 ramstage-y += reset.c
 ramstage-y += acp.c
 ramstage-y += sata.c
-ramstage-y += memmap.c
 ramstage-y += uart.c
 ramstage-y += finalize.c
 ramstage-y += soc_util.c