Add support for the Intel Eagle Heights development board.
Signed-off-by: Thomas Jourdan <thomas.jourdan@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4392 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Myles Watson
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6c96517a13
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1a692d8176
@@ -44,6 +44,7 @@
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#include "chip.h"
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/* The following Super I/O chips are currently supported by this driver: */
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#define LPC47M172 0x14
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#define FDC37B80X 0x42 /* Same ID: FDC37M70X (a.k.a. FDC37M707) */
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#define FDC37B78X 0x44
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#define FDC37B72X 0x4c
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@@ -62,6 +63,7 @@
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/* Register defines */
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#define DEVICE_ID_REG 0x20 /* Device ID register */
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#define DEVICE_REV_REG 0x21 /* Device revision register */
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#define DEVICE_TEST7_REG 0x29 /* Device test 7 register */
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/* Static variables for the Super I/O device ID and revision. */
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static int first_time = 1;
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@@ -116,6 +118,7 @@ static const struct logical_devices {
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int devs[MAX_LOGICAL_DEVICES];
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} logical_device_table[] = {
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// Chip FDC PP SP1 SP2 RTC KBC AUX XBUS HWM GAME PME MPU RT ACPI SMB
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{LPC47M172,{0, 3, 4, 2, -1, 7, -1, -1, -1, -1, -1, -1, 10, -1, -1}},
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{FDC37B80X,{0, 3, 4, 5, -1, 7, 8, -1, -1, -1, -1, -1, -1, -1, -1}},
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{FDC37B78X,{0, 3, 4, 5, 6, 7, 8, -1, -1, -1, -1, -1, -1, 10, -1}},
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{FDC37B72X,{0, 3, 4, 5, -1, 7, 8, -1, -1, -1, -1, -1, -1, 10, -1}},
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@@ -284,6 +287,7 @@ static void enable_dev(device_t dev)
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{
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int i, j, fn;
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int tmp[MAX_LOGICAL_DEVICES];
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uint8_t test7;
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if (first_time) {
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/* Read the device ID and revision of the Super I/O chip. */
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@@ -297,6 +301,19 @@ static void enable_dev(device_t dev)
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printk_info("Found SMSC Super I/O (ID=0x%02x, rev=0x%02x)\n",
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superio_id, superio_rev);
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first_time = 0;
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if(superio_id == LPC47M172) {
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/* Do not use the default logical device number
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* but instead the standard smsc registers set
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*/
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/* TEST7 configuration register (0x29)
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* bit 0 : LD_NUM (0 = new, 1 = std smsc)
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*/
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test7 = pnp_read_config(dev, DEVICE_TEST7_REG);
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test7 |= 1;
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pnp_write_config(dev, DEVICE_TEST7_REG, test7);
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}
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}
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/* Find the correct Super I/O. */
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