payloads: Reorganize Kconfig for external payloads

The integration of external payloads in coreboot
is a bit messy. You have to change the to level Kconfig
file for every payload (something that we recently fixed
for mainboards and chipsets). This means that updating
e.g. the SeaBIOS version requires a change outside of the
SeaBIOS directory.

With this patch you can create a new directory under
payloads/external and place a Kconfig and Kconfig.name
file in there, and the payload will automatically show
up when you do "make menuconfig".

Change-Id: I293abcb8eae581d4b3934e64897c0d339a27e7c1
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10828
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Stefan Reinauer
2015-06-30 15:58:56 -07:00
parent 06f1f8fed6
commit 1a8b7bfe50
11 changed files with 184 additions and 181 deletions

70
payloads/external/SeaBIOS/Kconfig vendored Normal file
View File

@@ -0,0 +1,70 @@
if PAYLOAD_SEABIOS
choice
prompt "SeaBIOS version"
default SEABIOS_STABLE
config SEABIOS_STABLE
bool "1.7.5"
help
Stable SeaBIOS version
config SEABIOS_MASTER
bool "master"
help
Newest SeaBIOS version
endchoice
config SEABIOS_PS2_TIMEOUT
prompt "PS/2 keyboard controller initialization timeout (milliseconds)"
default 0
depends on EXPERT
int
help
Some PS/2 keyboard controllers don't respond to commands immediately
after powering on. This specifies how long SeaBIOS will wait for the
keyboard controller to become ready before giving up.
config SEABIOS_THREAD_OPTIONROMS
prompt "Hardware init during option ROM execution"
default n
bool
help
Allow hardware init to run in parallel with optionrom execution.
This can reduce boot time, but can cause some timing
variations during option ROM code execution. It is not
known if all option ROMs will behave properly with this option.
config SEABIOS_MALLOC_UPPERMEMORY
bool
default y
help
Use the "Upper Memory Block" area (0xc0000-0xf0000) for internal
"low memory" allocations. If this is not selected, the memory is
instead allocated from the "9-segment" (0x90000-0xa0000).
This is not typically needed, but may be required on some platforms
to allow USB and SATA buffers to be written correctly by the
hardware. In general, if this is desired, the option will be
set to 'N' by the chipset Kconfig.
config SEABIOS_VGA_COREBOOT
prompt "Include generated option rom that implements legacy VGA BIOS compatibility"
default n
depends on !VGA_BIOS && (MAINBOARD_DO_NATIVE_VGA_INIT || MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG)
bool
help
Coreboot can initialize the GPU of some mainboards.
After initializing the GPU, the information about it can be passed to the payload.
Provide an option rom that implements this legacy VGA BIOS compatibility requirement.
config PAYLOAD_FILE
default "payloads/external/SeaBIOS/seabios/out/bios.bin.elf"
config PAYLOAD_VGABIOS_FILE
string
depends on SEABIOS_VGA_COREBOOT
default "payloads/external/SeaBIOS/seabios/out/vgabios.bin"
endif

View File

@@ -0,0 +1,9 @@
config PAYLOAD_SEABIOS
bool "SeaBIOS"
depends on ARCH_X86
help
Select this option if you want to build a coreboot image
with a SeaBIOS payload. If you don't know what this is
about, just leave it enabled.
See http://coreboot.org/Payloads for more information.