drivers/crb: use crb_tpm_ prefix instead of tpm2_
This prevents name clashes with drivers/spi/tpm and allows both to be potentially compiled in at the same time. Change-Id: I0aa2686103546e0696ab8dcf77e2b99bf9734915 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/81860 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
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@ -273,7 +273,7 @@ static void acpi_create_tpm2(acpi_header_t *header, void *unused)
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/* Hard to detect for coreboot. Just set it to 0 */
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tpm2->platform_class = 0;
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if (CONFIG(CRB_TPM) && tpm2_has_crb_active()) {
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if (CONFIG(CRB_TPM) && crb_tpm_is_active()) {
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/* Must be set to 7 for CRB Support */
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tpm2->control_area = CONFIG_CRB_TPM_BASE_ADDRESS + 0x40;
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tpm2->start_method = 7;
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@ -23,7 +23,7 @@ static const struct {
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{0xa13a, 0x8086, "Intel iTPM"}
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};
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static const char *tis_get_dev_name(struct tpm2_info *info)
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static const char *tis_get_dev_name(struct crb_tpm_info *info)
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{
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int i;
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@ -36,7 +36,7 @@ static const char *tis_get_dev_name(struct tpm2_info *info)
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static tpm_result_t crb_tpm_sendrecv(const uint8_t *sendbuf, size_t sbuf_size, uint8_t *recvbuf,
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size_t *rbuf_len)
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{
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int len = tpm2_process_command(sendbuf, sbuf_size, recvbuf, *rbuf_len);
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int len = crb_tpm_process_command(sendbuf, sbuf_size, recvbuf, *rbuf_len);
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if (len == 0)
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return TPM_CB_FAIL;
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@ -48,17 +48,17 @@ static tpm_result_t crb_tpm_sendrecv(const uint8_t *sendbuf, size_t sbuf_size, u
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tis_sendrecv_fn tis_probe(enum tpm_family *family)
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{
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struct tpm2_info info;
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struct crb_tpm_info info;
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/* Wake TPM up (if necessary) */
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if (tpm2_init())
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if (crb_tpm_init())
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return NULL;
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/* CRB interface exists only in TPM2 */
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if (family != NULL)
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*family = TPM_2;
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tpm2_get_info(&info);
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crb_tpm_get_info(&info);
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printk(BIOS_INFO, "Initialized TPM device %s revision %d\n", tis_get_dev_name(&info),
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info.revision);
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@ -137,7 +137,7 @@ static tpm_result_t tpm_get_cap(uint32_t property, uint32_t *value)
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static int smbios_write_type43_tpm(struct device *dev, int *handle, unsigned long *current)
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{
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struct tpm2_info info;
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struct crb_tpm_info info;
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uint32_t tpm_manuf, tpm_family;
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uint32_t fw_ver1, fw_ver2;
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uint8_t major_spec_ver, minor_spec_ver;
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@ -145,7 +145,7 @@ static int smbios_write_type43_tpm(struct device *dev, int *handle, unsigned lon
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if (tlcl_get_family() == TPM_1)
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return 0;
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tpm2_get_info(&info);
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crb_tpm_get_info(&info);
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/* If any of these have invalid values, assume TPM not present or disabled */
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if (info.vendor_id == 0 || info.vendor_id == 0xFFFF ||
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@ -54,7 +54,7 @@ static void crb_readControlArea(void)
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* register before each command submission otherwise the control area
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* is all zeroed. This has been observed on Alder Lake S CPU and may be
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* applicable to other new microarchitectures. Update the local control
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* area data to make tpm2_process_command not fail on buffer checks.
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* area data to make crb_tpm_process_command() not fail on buffer checks.
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* PTT command/response buffer is fixed to be at offset 0x80 and spans
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* up to the end of 4KB region for the current locality.
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*/
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@ -181,14 +181,14 @@ static tpm_result_t crb_switch_to_ready(void)
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}
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/*
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* tpm2_init
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* crb_tpm_init
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*
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* Even though the TPM does not need an initialization we check
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* if the TPM responds and is in IDLE mode, which should be the
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* normal bring up mode.
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*
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*/
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tpm_result_t tpm2_init(void)
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tpm_result_t crb_tpm_init(void)
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{
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tpm_result_t rc = crb_probe();
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if (rc) {
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@ -227,10 +227,10 @@ static void set_ptt_cmd_resp_buffers(void)
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}
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/*
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* tpm2_process_command
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* crb_tpm_process_command
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*/
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size_t tpm2_process_command(const void *tpm2_command, size_t command_size, void *tpm2_response,
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size_t max_response)
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size_t crb_tpm_process_command(const void *tpm2_command, size_t command_size,
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void *tpm2_response, size_t max_response)
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{
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tpm_result_t rc;
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@ -312,24 +312,24 @@ size_t tpm2_process_command(const void *tpm2_command, size_t command_size, void
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* Returns information about the TPM
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*
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*/
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void tpm2_get_info(struct tpm2_info *tpm2_info)
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void crb_tpm_get_info(struct crb_tpm_info *crb_tpm_info)
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{
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uint64_t interfaceReg = read64(CRB_REG(cur_loc, CRB_REG_INTF_ID));
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tpm2_info->vendor_id = (interfaceReg >> 48) & 0xFFFF;
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tpm2_info->device_id = (interfaceReg >> 32) & 0xFFFF;
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tpm2_info->revision = (interfaceReg >> 24) & 0xFF;
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crb_tpm_info->vendor_id = (interfaceReg >> 48) & 0xFFFF;
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crb_tpm_info->device_id = (interfaceReg >> 32) & 0xFFFF;
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crb_tpm_info->revision = (interfaceReg >> 24) & 0xFF;
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}
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/*
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* tpm2_has_crb_active
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* crb_tpm_is_active
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*
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* Checks that CRB interface is available and active.
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*
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* The body was derived from crb_probe() which unlike this function can also
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* write to registers.
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*/
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bool tpm2_has_crb_active(void)
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bool crb_tpm_is_active(void)
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{
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uint64_t tpmStatus = read64(CRB_REG(0, CRB_REG_INTF_ID));
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printk(BIOS_SPEW, "Interface ID Reg. %llx\n", tpmStatus);
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@ -53,15 +53,15 @@
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/* START Register related */
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#define CRB_REG_START_START 0x01
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/* TPM Info Struct */
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struct tpm2_info {
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/* CRB TPM Info Struct */
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struct crb_tpm_info {
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uint16_t vendor_id;
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uint16_t device_id;
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uint16_t revision;
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};
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tpm_result_t tpm2_init(void);
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void tpm2_get_info(struct tpm2_info *tpm2_info);
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size_t tpm2_process_command(const void *tpm2_command, size_t command_size,
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void *tpm2_response, size_t max_response);
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bool tpm2_has_crb_active(void);
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tpm_result_t crb_tpm_init(void);
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void crb_tpm_get_info(struct crb_tpm_info *crb_tpm_info);
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size_t crb_tpm_process_command(const void *tpm2_command, size_t command_size,
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void *tpm2_response, size_t max_response);
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bool crb_tpm_is_active(void);
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