AGESA, binaryPI: implement C bootblock
Modify CAR setup to work in bootblock. Provide bootblock C file with necessary C bootblock functions. Additionally chache the ROM and set the MMCONF base before jumping to bootblock main. Change-Id: I29916a96f490ff717c69dc7cd565d74a83dbfb0d Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36914 Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Kyösti Mälkki
parent
b643d3df8a
commit
1b12b64dab
@@ -49,6 +49,14 @@ config DCACHE_RAM_SIZE
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hex
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default 0x10000
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config DCACHE_BSP_STACK_SIZE
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hex
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default 0x4000
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config C_ENV_BOOTBLOCK_SIZE
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hex
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default 0x8000
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config ENABLE_MRC_CACHE
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bool "Use cached memory configuration"
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default n
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@@ -48,6 +48,14 @@ config DCACHE_RAM_SIZE
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hex
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default 0x10000
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config DCACHE_BSP_STACK_SIZE
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hex
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default 0x4000
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config C_ENV_BOOTBLOCK_SIZE
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hex
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default 0x8000
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endif # CPU_AMD_PI
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source "src/cpu/amd/pi/00630F01/Kconfig"
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