AGESA, binaryPI: implement C bootblock

Modify CAR setup to work in bootblock. Provide bootblock C file with
necessary C bootblock functions. Additionally chache the ROM and set
the MMCONF base before jumping to bootblock main.

Change-Id: I29916a96f490ff717c69dc7cd565d74a83dbfb0d
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36914
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Michał Żygowski
2019-11-24 16:32:05 +01:00
committed by Kyösti Mälkki
parent b643d3df8a
commit 1b12b64dab
7 changed files with 106 additions and 5 deletions

View File

@@ -49,6 +49,14 @@ config DCACHE_RAM_SIZE
hex
default 0x10000
config DCACHE_BSP_STACK_SIZE
hex
default 0x4000
config C_ENV_BOOTBLOCK_SIZE
hex
default 0x8000
config ENABLE_MRC_CACHE
bool "Use cached memory configuration"
default n

View File

@@ -48,6 +48,14 @@ config DCACHE_RAM_SIZE
hex
default 0x10000
config DCACHE_BSP_STACK_SIZE
hex
default 0x4000
config C_ENV_BOOTBLOCK_SIZE
hex
default 0x8000
endif # CPU_AMD_PI
source "src/cpu/amd/pi/00630F01/Kconfig"