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include/device/pci_ids.h: Update TWL device IDs

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Set lowercase hex format for IGD DIDs.

BUG=b:326901448
TEST=Build tivviks and verify the IGD IDs.

Change-Id: I1299512d1c48eba854fea2ec394cef40d44a87d7
Signed-off-by: Saurabh Mishra <mishra.saurabh@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82414
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
This commit is contained in:
Saurabh Mishra
2024-05-13 14:49:15 +05:30
committed by Felix Held
parent 3d4128299f
commit 1b2fe88a04
1 changed files with 2 additions and 2 deletions
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4
src/include/device/pci_ids.h
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@@ -4182,8 +4182,8 @@
#define PCI_DID_INTEL_RPL_U_GT4 0xa7ac #define PCI_DID_INTEL_RPL_U_GT4 0xa7ac
#define PCI_DID_INTEL_RPL_U_GT5 0xa7ad #define PCI_DID_INTEL_RPL_U_GT5 0xa7ad
#define PCI_DID_INTEL_LNL_M_GT2 0x64a0 #define PCI_DID_INTEL_LNL_M_GT2 0x64a0
#define PCI_DID_INTEL_TWL_GT1_1 0x46D3 #define PCI_DID_INTEL_TWL_GT1_1 0x46d3
#define PCI_DID_INTEL_TWL_GT1_2 0x46D4 #define PCI_DID_INTEL_TWL_GT1_2 0x46d4
#define PCI_DID_INTEL_PTL_GT2 0x64a0 #define PCI_DID_INTEL_PTL_GT2 0x64a0
/* Intel Northbridge Ids */ /* Intel Northbridge Ids */