libpayload: Add USB device mode driver
Add a framework for USB device mode controllers and a driver for the ChipIdea controller which is part of the tegra platform. TODO: - fix USB detach/attach - implement zero length packet handling properly BUG=chrome-os-partner:35861 TEST=none BRANCH=none Change-Id: I8defeea78b5a3bdbf9c1b1222c2702eaf3256b81 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 542332291880c4026a05a960ceb91d37891ee018 Original-Change-Id: Ib4068d201dd63ebeda80157bd3130f3059919cdd Original-Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/243272 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/8756 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
Patrick Georgi
472
payloads/libpayload/drivers/udc/chipidea.c
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472
payloads/libpayload/drivers/udc/chipidea.c
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@@ -0,0 +1,472 @@
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/*
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* This file is part of the libpayload project.
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*
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* Copyright (C) 2015 Google Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <libpayload.h>
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#include <arch/cache.h>
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#include <assert.h>
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#include <endian.h>
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#include <queue.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <stdlib.h>
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#include <usb/usb.h>
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#include <udc/udc.h>
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#include <udc/chipidea.h>
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#include "chipidea_priv.h"
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#ifdef DEBUG
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#define debug(x...) printf(x)
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#else
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#define debug(x...) do {} while (0)
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#endif
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#define min(a, b) (((a) < (b)) ? (a) : (b))
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static struct qh *get_qh(struct chipidea_pdata *p, int endpoint, int in_dir)
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{
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assert(in_dir <= 1);
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return &p->qhlist[2 * endpoint + in_dir];
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}
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static unsigned int ep_to_bits(int ep, int in_dir)
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{
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return ep + (in_dir ? 16 : 0);
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}
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static void clear_setup_ep(struct chipidea_pdata *p, int endpoint)
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{
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writel(1 << endpoint, &p->opreg->epsetupstat);
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}
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static void clear_ep(struct chipidea_pdata *p, int endpoint, int in_dir)
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{
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writel(1 << ep_to_bits(endpoint, in_dir), &p->opreg->epcomplete);
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}
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static int chipidea_hw_init(struct usbdev_ctrl *this, void *_opreg,
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const device_descriptor_t *dd)
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{
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struct chipidea_opreg *opreg = _opreg;
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struct chipidea_pdata *p = CI_PDATA(this);
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p->opreg = phys_to_virt(opreg);
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p->qhlist = dma_memalign(4096, sizeof(struct qh) * CI_QHELEMENTS);
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memcpy(&this->device_descriptor, dd, sizeof(*dd));
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if (p->qhlist == NULL)
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die("failed to allocate memory for usb device mode");
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memset(p->qhlist, 0, sizeof(struct qh) * CI_QHELEMENTS);
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SLIST_INIT(&this->configs);
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int i;
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for (i = 0; i < 16; i++) {
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SIMPLEQ_INIT(&p->job_queue[i][0]);
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SIMPLEQ_INIT(&p->job_queue[i][1]);
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}
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for (i = 0; i < CI_QHELEMENTS; i++) {
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p->qhlist[i].config = QH_MPS(512) | QH_NO_AUTO_ZLT | QH_IOS;
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p->qhlist[i].td.next = TD_TERMINATE;
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}
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/* EP0 in/out are hardwired for SETUP */
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p->qhlist[0].config = QH_MPS(64) | QH_NO_AUTO_ZLT | QH_IOS;
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p->qhlist[1].config = QH_MPS(64) | QH_NO_AUTO_ZLT | QH_IOS;
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do {
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debug("waiting for usb phy clk valid: %x\n",
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readl(&p->opreg->susp_ctrl));
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mdelay(1);
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} while ((readl(&p->opreg->susp_ctrl) & (1 << 7)) == 0);
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writel(USBCMD_8MICRO | USBCMD_RST, &p->opreg->usbcmd);
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mdelay(1);
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/* enable device mode */
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writel(2, &p->opreg->usbmode);
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dcache_clean_by_mva(p->qhlist, sizeof(struct qh) * CI_QHELEMENTS);
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writel(virt_to_phys(p->qhlist), &p->opreg->epbase);
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writel(0xffffffff, &p->opreg->epflush);
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/* enable EP0 */
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writel((1 << 23) | (1 << 22) | (1 << 7) | (1 << 6),
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&p->opreg->epctrl[0]);
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/* clear status register */
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writel(readl(&p->opreg->usbsts), &p->opreg->usbsts);
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debug("taking controller out of reset\n");
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writel(USBCMD_8MICRO | USBCMD_RUN, &p->opreg->usbcmd);
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return 1;
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}
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static void chipidea_halt_ep(struct usbdev_ctrl *this, int ep, int in_dir)
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{
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struct chipidea_pdata *p = CI_PDATA(this);
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writel(1 << ep_to_bits(ep, in_dir), &p->opreg->epflush);
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while (readl(&p->opreg->epflush))
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;
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clrbits_le32(&p->opreg->epctrl[ep], 1 << (7 + (in_dir ? 16 : 0)));
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}
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static void chipidea_start_ep(struct usbdev_ctrl *this,
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int ep, int in_dir, int ep_type, int mps)
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{
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struct chipidea_pdata *p = CI_PDATA(this);
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struct qh *qh = get_qh(p, ep, in_dir);
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qh->config = (mps << 16) | QH_NO_AUTO_ZLT | QH_IOS;
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dcache_clean_by_mva(qh, sizeof(*qh));
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in_dir = in_dir ? 1 : 0;
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debug("enabling %d-%d (type %d)\n", ep, in_dir, ep_type);
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/* enable endpoint, reset data toggle */
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setbits_le32(&p->opreg->epctrl[ep],
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((1 << 7) | (1 << 6) | (ep_type << 2)) << (in_dir*16));
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p->ep_busy[ep][in_dir] = 0;
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}
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static void advance_endpoint(struct chipidea_pdata *p, int endpoint, int in_dir)
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{
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if (p->ep_busy[endpoint][in_dir])
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return;
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if (SIMPLEQ_EMPTY(&p->job_queue[endpoint][in_dir]))
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return;
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struct job *job = SIMPLEQ_FIRST(&p->job_queue[endpoint][in_dir]);
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struct qh *qh = get_qh(p, endpoint, in_dir);
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uint32_t start = (uint32_t)(uintptr_t)job->data;
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uint32_t offset = (start & 0xfff);
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/* unlike with typical EHCI controllers,
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* a full TD transfers either 0x5000 bytes if
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* page aligned or 0x4000 bytes if not.
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*/
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int maxsize = 0x5000;
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if (offset > 0)
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maxsize = 0x4000;
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uint32_t td_count = (job->length + maxsize - 1) / maxsize;
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/* special case for zero length packets */
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if (td_count == 0)
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td_count = 1;
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if (job->zlp)
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td_count++;
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struct td *tds = dma_memalign(32, sizeof(struct td) * td_count);
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memset(tds, 0, sizeof(struct td) * td_count);
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int i;
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int remaining = job->length;
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for (i = 0; i < td_count; i++) {
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int datacount = min(maxsize, remaining);
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debug("td %d, %d bytes\n", i, datacount);
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tds[i].next = (uint32_t)virt_to_phys(&tds[i+1]);
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tds[i].info = TD_INFO_LEN(datacount) | TD_INFO_ACTIVE;
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tds[i].page0 = start;
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tds[i].page1 = (start & 0xfffff000) + 0x1000;
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tds[i].page2 = (start & 0xfffff000) + 0x2000;
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tds[i].page3 = (start & 0xfffff000) + 0x3000;
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tds[i].page4 = (start & 0xfffff000) + 0x4000;
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remaining -= datacount;
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start = start + datacount;
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}
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tds[td_count - 1].next = TD_TERMINATE;
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tds[td_count - 1].info |= TD_INFO_IOC;
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qh->td.next = (uint32_t)virt_to_phys(tds);
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qh->td.info = 0;
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job->tds = tds;
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job->td_count = td_count;
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dcache_clean_by_mva(tds, sizeof(struct td) * td_count);
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dcache_clean_by_mva(job->data, job->length);
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dcache_clean_by_mva(qh, sizeof(*qh));
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debug("priming EP %d-%d with %zx bytes starting at %x (%p)\n", endpoint,
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in_dir, job->length, tds[0].page0, job->data);
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writel(1 << ep_to_bits(endpoint, in_dir), &p->opreg->epprime);
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while (readl(&p->opreg->epprime))
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;
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p->ep_busy[endpoint][in_dir] = 1;
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}
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static void handle_endpoint(struct usbdev_ctrl *this, int endpoint, int in_dir)
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{
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struct chipidea_pdata *p = CI_PDATA(this);
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struct job *job = SIMPLEQ_FIRST(&p->job_queue[endpoint][in_dir]);
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SIMPLEQ_REMOVE_HEAD(&p->job_queue[endpoint][in_dir], queue);
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if (in_dir)
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dcache_invalidate_by_mva(job->data, job->length);
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int length = job->length;
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int i = 0;
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do {
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int active;
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do {
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dcache_invalidate_by_mva(&job->tds[i],
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sizeof(struct td));
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active = job->tds[i].info & TD_INFO_ACTIVE;
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debug("%d-%d: info %08x, page0 %x, next %x\n",
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endpoint, in_dir, job->tds[i].info,
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job->tds[i].page0, job->tds[i].next);
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} while (active);
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/*
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* The controller writes back the length field in info
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* with the number of bytes it did _not_ process.
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* Hence, take the originally scheduled length and
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* subtract whatever lengths we still find - that gives
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* us the data that the controller did transfer.
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*/
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int remaining = job->tds[i].info >> 16;
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length -= remaining;
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} while (job->tds[i++].next != TD_TERMINATE);
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debug("%d-%d: scheduled %zd, now %d bytes\n", endpoint, in_dir,
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job->length, length);
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if (this->current_config &&
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this->current_config->interfaces[0].handle_packet)
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this->current_config->interfaces[0].handle_packet(this,
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endpoint, in_dir, job->data, length);
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free(job->tds);
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if (job->autofree)
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free(job->data);
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free(job);
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p->ep_busy[endpoint][in_dir] = 0;
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advance_endpoint(p, endpoint, in_dir);
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}
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static void start_setup(struct usbdev_ctrl *this, int ep)
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{
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dev_req_t dr;
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struct chipidea_pdata *p = CI_PDATA(this);
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struct qh *qh = get_qh(p, ep, 0);
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dcache_invalidate_by_mva(qh, sizeof(*qh));
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memcpy(&dr, qh->setup_data, sizeof(qh->setup_data));
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clear_setup_ep(p, ep);
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#ifdef DEBUG
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hexdump((unsigned long)&dr, sizeof(dr));
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#endif
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udc_handle_setup(this, ep, &dr);
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}
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static void chipidea_enqueue_packet(struct usbdev_ctrl *this, int endpoint,
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int in_dir, void *data, int len, int zlp, int autofree)
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{
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struct chipidea_pdata *p = CI_PDATA(this);
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struct job *job = malloc(sizeof(*job));
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job->data = data;
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job->length = len;
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job->zlp = zlp;
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job->autofree = autofree;
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debug("adding job of %d bytes to EP %d-%d\n", len, endpoint, in_dir);
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SIMPLEQ_INSERT_TAIL(&p->job_queue[endpoint][in_dir], job, queue);
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if ((endpoint == 0) || (this->initialized))
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advance_endpoint(p, endpoint, in_dir);
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}
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static int chipidea_poll(struct usbdev_ctrl *this)
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{
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struct chipidea_pdata *p = CI_PDATA(this);
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uint32_t sts = readl(&p->opreg->usbsts);
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writel(sts, &p->opreg->usbsts); /* clear */
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/* new information if the bus is high speed or not */
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if (sts & USBSTS_PCI) {
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debug("USB speed negotiation: ");
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if ((readl(&p->opreg->devlc) & DEVLC_HOSTSPEED_MASK)
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== DEVLC_HOSTSPEED(2)) {
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debug("high speed\n");
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// TODO: implement
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} else {
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debug("full speed\n");
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// TODO: implement
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}
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}
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/* reset requested. stop all activities */
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if (sts & USBSTS_URI) {
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int i;
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debug("USB reset requested\n");
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if (this->initialized) {
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writel(readl(&p->opreg->epstat), &p->opreg->epstat);
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writel(readl(&p->opreg->epsetupstat),
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&p->opreg->epsetupstat);
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writel(0xffffffff, &p->opreg->epflush);
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for (i = 1; i < 16; i++)
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writel(0, &p->opreg->epctrl[i]);
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this->initialized = 0;
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}
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writel((1 << 22) | (1 << 6), &p->opreg->epctrl[0]);
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p->qhlist[0].config = QH_MPS(64) | QH_NO_AUTO_ZLT | QH_IOS;
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p->qhlist[1].config = QH_MPS(64) | QH_NO_AUTO_ZLT | QH_IOS;
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dcache_clean_by_mva(p->qhlist, 2 * sizeof(struct qh));
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}
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if (sts & (USBSTS_UEI | USBSTS_UI)) {
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uint32_t bitmap = readl(&p->opreg->epsetupstat);
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int ep = 0;
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while (bitmap) {
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if (bitmap & 1) {
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debug("incoming packet on EP %d (setup)\n", ep);
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start_setup(this, ep);
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}
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bitmap >>= 1;
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ep++;
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}
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bitmap = readl(&p->opreg->epcomplete);
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ep = 0;
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int dir_in = 0;
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while (bitmap) {
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if (bitmap & 1) {
|
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debug("incoming packet on EP %d (%s)\n",
|
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ep, dir_in ? "intr/in" : "out");
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handle_endpoint(this, ep & 0xf, dir_in);
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clear_ep(p, ep & 0xf, dir_in);
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}
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bitmap >>= 1;
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ep++;
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if (ep == 16)
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dir_in = 1;
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}
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}
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return 1;
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}
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|
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static void chipidea_shutdown(struct usbdev_ctrl *this)
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{
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struct chipidea_pdata *p = CI_PDATA(this);
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int i, j;
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int is_empty = 0;
|
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while (!is_empty) {
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is_empty = 1;
|
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this->poll(this);
|
||||
for (i = 0; i < 16; i++)
|
||||
for (j = 0; j < 2; j++)
|
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if (!SIMPLEQ_EMPTY(&p->job_queue[i][j]))
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is_empty = 0;
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}
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writel(0xffffffff, &p->opreg->epflush);
|
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writel(USBCMD_8MICRO | USBCMD_RST, &p->opreg->usbcmd);
|
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writel(0, &p->opreg->usbmode);
|
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writel(USBCMD_8MICRO, &p->opreg->usbcmd);
|
||||
free(p->qhlist);
|
||||
free(p);
|
||||
free(this);
|
||||
}
|
||||
|
||||
static void chipidea_set_address(struct usbdev_ctrl *this, int address)
|
||||
{
|
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struct chipidea_pdata *p = CI_PDATA(this);
|
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writel((address << 25) | (1 << 24), &p->opreg->usbadr);
|
||||
}
|
||||
|
||||
static void chipidea_stall(struct usbdev_ctrl *this,
|
||||
uint8_t ep, int in_dir, int set)
|
||||
{
|
||||
struct chipidea_pdata *p = CI_PDATA(this);
|
||||
assert(ep < 16);
|
||||
uint32_t *ctrl = &p->opreg->epctrl[ep];
|
||||
in_dir = in_dir ? 1 : 0;
|
||||
if (set) {
|
||||
if (in_dir)
|
||||
setbits_le32(ctrl, 1 << 16);
|
||||
else
|
||||
setbits_le32(ctrl, 1 << 0);
|
||||
} else {
|
||||
/* reset STALL bit, reset data toggle */
|
||||
if (in_dir) {
|
||||
setbits_le32(ctrl, 1 << 22);
|
||||
clrbits_le32(ctrl, 1 << 16);
|
||||
} else {
|
||||
setbits_le32(ctrl, 1 << 6);
|
||||
setbits_le32(ctrl, 1 << 0);
|
||||
}
|
||||
}
|
||||
this->ep_halted[ep][in_dir] = set;
|
||||
}
|
||||
|
||||
static void *chipidea_malloc(size_t size)
|
||||
{
|
||||
return dma_malloc(size);
|
||||
}
|
||||
|
||||
static void chipidea_free(void *ptr)
|
||||
{
|
||||
free(ptr);
|
||||
}
|
||||
|
||||
struct usbdev_ctrl *chipidea_init(device_descriptor_t *dd)
|
||||
{
|
||||
struct usbdev_ctrl *ctrl = calloc(1, sizeof(*ctrl));
|
||||
if (ctrl == NULL)
|
||||
return NULL;
|
||||
ctrl->pdata = calloc(1, sizeof(struct chipidea_pdata));
|
||||
if (ctrl->pdata == NULL) {
|
||||
free(ctrl);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
ctrl->poll = chipidea_poll;
|
||||
ctrl->add_gadget = udc_add_gadget;
|
||||
ctrl->enqueue_packet = chipidea_enqueue_packet;
|
||||
ctrl->shutdown = chipidea_shutdown;
|
||||
ctrl->set_address = chipidea_set_address;
|
||||
ctrl->stall = chipidea_stall;
|
||||
ctrl->halt_ep = chipidea_halt_ep;
|
||||
ctrl->start_ep = chipidea_start_ep;
|
||||
ctrl->alloc_data = chipidea_malloc;
|
||||
ctrl->free_data = chipidea_free;
|
||||
ctrl->initialized = 0;
|
||||
|
||||
if (!chipidea_hw_init(ctrl, (void *)0x7d000000, dd)) {
|
||||
free(ctrl->pdata);
|
||||
free(ctrl);
|
||||
return NULL;
|
||||
}
|
||||
return ctrl;
|
||||
}
|
||||
Reference in New Issue
Block a user