arch/x86: Use a common timestamp.inc with romcc bootblocks

The same file was replicated three times for certain
soc/intel bootblocks, yet there are no indications or need to do
chipset-specific initialisation.

There is no harm in storing the TSC values in MMX registers
even when they would not be used.

Change-Id: Iec6fa0889f5887effca1d99ef830d383fb733648
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/30393
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

src/arch/x86/bootblock_romcc.S

@@ -19,7 +19,7 @@
  *     - reset16.inc: the reset vector
  *     - entry16.inc: protected mode setup
  *     - entry32.inc: segment descriptor setup
- *     - CONFIG_CHIPSET_BOOTBLOCK_INCLUDE: chipset-specific initialization
+ *     - timestamp.inc: store TSC in MMX registers
  *     - generated/bootblock.inc: ROMCC part of the bootblock
  *
  * This is used on platforms which do not select C_ENVIRONMENT_BOOTBLOCK, and it
@@ -35,9 +35,7 @@
 #include <cpu/x86/16bit/reset16.inc>
 #include <cpu/x86/32bit/entry32.inc>
 
-#ifdef CONFIG_CHIPSET_BOOTBLOCK_INCLUDE
-#include CONFIG_CHIPSET_BOOTBLOCK_INCLUDE
-#endif
+#include <arch/x86/timestamp.inc>
 
 #if IS_ENABLED(CONFIG_SSE)
 #include <cpu/x86/sse_enable.inc>

src/soc/intel/baytrail/Kconfig

@@ -166,8 +166,4 @@ config REFCODE_BLOB_FILE
 
 endif # HAVE_REFCODE_BLOB
 
-config CHIPSET_BOOTBLOCK_INCLUDE
-	string
-	default "soc/intel/baytrail/bootblock/timestamp.inc"
-
 endif

src/soc/intel/braswell/Kconfig

@@ -123,10 +123,6 @@ config IED_REGION_SIZE
 	hex
 	default 0x400000
 
-config CHIPSET_BOOTBLOCK_INCLUDE
-	string
-	default "soc/intel/braswell/bootblock/timestamp.inc"
-
 config DISABLE_HPET
 	bool "Disable the HPET device"
 	default n

src/soc/intel/braswell/bootblock/timestamp.inc

@@ -1,33 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/*
- * Store the initial timestamp for booting in mmx registers. This works
- * because the bootblock isn't being compiled with MMX support so mm0 and
- * mm1 will be preserved into romstage.
- */
-	.code32
-
-.global stash_timestamp
-stash_timestamp:
-
-	/* Save the BIST value */
-	movl	%eax, %ebp
-
-	finit
-	rdtsc
-	movd	%eax, %mm0
-	movd	%edx, %mm1
-
-	/* Restore the BIST value to %eax */
-	movl	%ebp, %eax

src/soc/intel/broadwell/Kconfig

@@ -204,8 +204,4 @@ config REFCODE_BLOB_FILE
 
 endif # HAVE_REFCODE_BLOB
 
-config CHIPSET_BOOTBLOCK_INCLUDE
-	string
-	default "soc/intel/broadwell/bootblock/timestamp.inc"
-
 endif

src/soc/intel/broadwell/bootblock/timestamp.inc

@@ -1,33 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-/*
- * Store the initial timestamp for booting in mmx registers. This works
- * because the bootblock isn't being compiled with MMX support so mm0 and
- * mm1 will be preserved into romstage.
- */
-	.code32
-
-.global stash_timestamp
-stash_timestamp:
-
-	/* Save the BIST value */
-	movl	%eax, %ebp
-
-	finit
-	rdtsc
-	movd	%eax, %mm0
-	movd	%edx, %mm1
-
-	/* Restore the BIST value to %eax */
-	movl	%ebp, %eax